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From: "Pali Rohár" <pali@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: "Gregory Clement" <gregory.clement@bootlin.com>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Marek Behún" <kabel@kernel.org>,
	"Linux ARM" <linux-arm-kernel@lists.infradead.org>,
	DTML <devicetree@vger.kernel.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: marvell: armada-37xx: Increase PCIe IO size from 64 KiB to 1 MiB
Date: Fri, 18 Feb 2022 22:29:39 +0100	[thread overview]
Message-ID: <20220218212939.adfnbgx5fdita55m@pali> (raw)
In-Reply-To: <CAK8P3a2D8Yv+KpM4NJyP9mosieqbhHh08=mdEy+OA84Vx6FVCQ@mail.gmail.com>

On Friday 18 February 2022 17:43:04 Arnd Bergmann wrote:
> On Thu, Jan 13, 2022 at 6:07 PM Pali Rohár <pali@kernel.org> wrote:
> >
> > Commit 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM
> > space") increased size of PCIe MEM to 127 MiB, which is the maximal
> > possible size for allocated 128 MiB PCIe window. PCIe IO size in that
> > commit was unchanged.
> >
> > Armada 3720 PCIe controller supports 32-bit IO space mapping so it is
> > possible to assign more than 64 KiB if address space for IO.
> >
> > Currently controller has assigned 127 MiB + 64 KiB memory and therefore
> > there is 960 KiB of unused memory. So assign it to IO space by increasing
> > IO window from 64 KiB to 1 MiB.
> >
> > DTS file armada-3720-turris-mox.dts already uses whole 128 MiB space, so
> > only update comment about 32-bit IO space mapping.
> >
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > Fixes: 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM space")
> 
> I just saw this is the fixes pull request, and it seems very odd. Does this
> fix an actual bug? Note that Linux normally doesn't map more than 64KB
> of I/O space per PCI domain, so it should not make a difference to us.
> 
> Also, note that having a high bus address for the I/O space (0xefff0000,
> as as the CPU physical address here) means that a lot of the older
> devices that actually require I/O space won't work, because they need a
> low bus address in the first few KB.
> 
> Is this mapping a requirement from a broken bootloader, or can you change
> the mapping of the I/O port window in the physical space to the usual
> bus address 0?
> 
>         Arnd

As we discussed on IRC changing mapping of I/O to bus address 0x0 is
possible and together with recent changes of pci-aardvark.c driver
should work out-of-the box.

I sent patch which is changing I/O bus address to 0x0:
https://lore.kernel.org/linux-arm-kernel/20220218212526.16021-1-pali@kernel.org/

Please look at it.

      parent reply	other threads:[~2022-02-18 21:29 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-13 17:07 [PATCH] arm64: dts: marvell: armada-37xx: Increase PCIe IO size from 64 KiB to 1 MiB Pali Rohár
2022-01-21  9:02 ` Gregory CLEMENT
2022-02-18 16:43 ` Arnd Bergmann
2022-02-18 16:55   ` Pali Rohár
2022-02-18 17:19     ` Arnd Bergmann
2022-02-18 17:26       ` Pali Rohár
2022-02-18 21:29   ` Pali Rohár [this message]

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