From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
dmaengine <dmaengine@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
Gareth Williams <gareth.williams.jx@renesas.com>,
Phil Edworthy <phil.edworthy@renesas.com>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-clk <linux-clk@vger.kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Milan Stevanovic <milan.stevanovic@se.com>,
Jimmy Lalande <jimmy.lalande@se.com>,
Pascal Eberhard <pascal.eberhard@se.com>
Subject: Re: [PATCH v2 4/8] dma: dmamux: Introduce RZN1 DMA router support
Date: Thu, 24 Feb 2022 10:27:24 +0100 [thread overview]
Message-ID: <20220224102724.74e2c406@xps13> (raw)
In-Reply-To: <CAMuHMdVr4tiicEn-BbBnCd-zP6ncr=zKd-eDvPYoYKNWUKsOBw@mail.gmail.com>
Hi Geert,
geert@linux-m68k.org wrote on Thu, 24 Feb 2022 10:14:48 +0100:
> Hi Miquel,
>
> On Wed, Feb 23, 2022 at 5:49 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> > geert@linux-m68k.org wrote on Wed, 23 Feb 2022 13:46:11 +0100:
> > > On Tue, Feb 22, 2022 at 11:35 AM Miquel Raynal
> > > <miquel.raynal@bootlin.com> wrote:
> > > > The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional
> > > > dmamux register located in the system control area which can take up to
> > > > 32 requests (16 per DMA controller). Each DMA channel can be wired to
> > > > two different peripherals.
> > > >
> > > > We need two additional information from the 'dmas' property: the channel
> > > > (bit in the dmamux register) that must be accessed and the value of the
> > > > mux for this channel.
> > > >
> > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > >
> > > Thanks for your patch!
> > >
> > > > --- /dev/null
> > > > +++ b/drivers/dma/dw/dmamux.c
>
> > > > +static int rzn1_dmamux_probe(struct platform_device *pdev)
> > > > +{
> > > > + struct device_node *mux_node = pdev->dev.of_node;
> > > > + const struct of_device_id *match;
> > > > + struct device_node *dmac_node;
> > > > + struct rzn1_dmamux_data *dmamux;
> > > > +
> > > > + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL);
> > > > + if (!dmamux)
> > > > + return -ENOMEM;
> > > > +
> > > > + mutex_init(&dmamux->lock);
> > > > +
> > > > + dmac_node = of_parse_phandle(mux_node, "dma-masters", 0);
> > > > + if (!dmac_node)
> > > > + return dev_err_probe(&pdev->dev, -ENODEV, "Can't get DMA master node\n");
> > > > +
> > > > + match = of_match_node(rzn1_dmac_match, dmac_node);
> > > > + if (!match) {
> > > > + of_node_put(dmac_node);
> > > > + return dev_err_probe(&pdev->dev, -EINVAL, "DMA master is not supported\n");
> > > > + }
> > > > +
> > > > + if (of_property_read_u32(dmac_node, "dma-requests", &dmamux->dmac_requests)) {
> > > > + of_node_put(dmac_node);
> > > > + return dev_err_probe(&pdev->dev, -EINVAL, "Missing DMAC requests information\n");
> > > > + }
> > > > +
> > > > + of_node_put(dmac_node);
> > >
> > > When hardcoding dmac_requests to 16, I guess the whole dmac_node
> > > handling can be removed?
> >
> > Not really, I think the following checks are still valid and fortunate,
> > and they need some of_ handling to work properly:
> > - verify that the chan requested is within the range of dmac_requests
> > in the _route_allocate() callback
> > - ensure the dmamux is wired to a supported DMAC in the DT (this
> > condition might be loosen in the future if needed or dropped entirely
> > if considered useless)
> > - I would like to add a check against the number of requests supported
> > by the dmamux and the dmac (not done yet).
> > For the record, I've taken inspiration to write these lines on the other
> > dma router driver from TI.
> >
> > Unless, and I know some people think like that, we do not try to
> > validate the DT and if the DT is wrong that is none of our business.
> >
> > >
> > > > +
> > > > + if (of_property_read_u32(mux_node, "dma-requests", &dmamux->dmamux_requests)) {
> > >
> > > Don't obtain from DT, but fix to 32?
> >
> > I believe the answer to the previous question should give me a clue
> > about why you would prefer hardcoding than reading from the DT such
> > an information. Perhaps I should mention that all these properties are
> > already part of the bindings, and are not specific to the driver, the
> > information will be in the DT anyway.
>
> The 32 is a property of the hardware (32 bits in DMAMUX register).
> So IMHO it falls under the "differentiate by compatible value,
> not by property" rule.
I agree this is a property of the hardware and feels redundant here.
What about the checks below, do you agree with the fact that I should
keep them or do you prefer dropping them (all? partially?)?
Thanks,
Miquèl
next prev parent reply other threads:[~2022-02-24 9:27 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 10:34 [PATCH v2 0/8] RZN1 DMA support Miquel Raynal
2022-02-22 10:34 ` [PATCH v2 1/8] dt-bindings: dma: Introduce RZN1 dmamux bindings Miquel Raynal
2022-02-23 11:27 ` Geert Uytterhoeven
2022-02-22 10:34 ` [PATCH v2 2/8] dt-bindings: dma: Introduce RZN1 DMA compatible Miquel Raynal
2022-02-23 12:21 ` Geert Uytterhoeven
2022-02-23 15:49 ` Miquel Raynal
2022-02-23 16:16 ` Geert Uytterhoeven
2022-02-23 17:10 ` Miquel Raynal
2022-02-22 10:34 ` [PATCH v2 3/8] soc: renesas: rzn1-sysc: Export function to set dmamux Miquel Raynal
2022-02-23 12:28 ` Geert Uytterhoeven
2022-02-23 15:54 ` Miquel Raynal
2022-02-22 10:34 ` [PATCH v2 4/8] dma: dmamux: Introduce RZN1 DMA router support Miquel Raynal
2022-02-22 20:27 ` kernel test robot
2022-02-23 8:26 ` Miquel Raynal
2022-02-23 10:31 ` Miquel Raynal
2022-02-23 12:46 ` Geert Uytterhoeven
2022-02-23 16:49 ` Miquel Raynal
2022-02-24 9:14 ` Geert Uytterhoeven
2022-02-24 9:27 ` Miquel Raynal [this message]
2022-02-24 9:52 ` Geert Uytterhoeven
2022-02-24 11:36 ` Miquel Raynal
2022-02-24 12:16 ` Geert Uytterhoeven
2022-02-24 15:56 ` Miquel Raynal
2022-02-22 10:34 ` [PATCH v2 5/8] dma: dw: Avoid partial transfers Miquel Raynal
2022-02-23 13:35 ` Andy Shevchenko
2022-02-24 16:30 ` Miquel Raynal
2022-02-25 20:30 ` Andy Shevchenko
2022-02-22 10:34 ` [PATCH v2 6/8] dma: dw: Add RZN1 compatible Miquel Raynal
2022-02-23 12:50 ` Geert Uytterhoeven
2022-02-22 10:34 ` [PATCH v2 7/8] ARM: dts: r9a06g032: Add the two DMA nodes Miquel Raynal
2022-02-23 12:54 ` Geert Uytterhoeven
2022-02-23 17:14 ` Miquel Raynal
2022-02-24 9:17 ` Geert Uytterhoeven
2022-02-22 10:34 ` [PATCH v2 8/8] ARM: dts: r9a06g032: Describe the DMA router Miquel Raynal
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