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Thu, 24 Feb 2022 04:39:39 -0800 From: Akhil R To: , , , , , , , , , , , , CC: Subject: [PATCH v21 1/2] dt-bindings: dmaengine: Add doc for tegra gpcdma Date: Thu, 24 Feb 2022 18:09:02 +0530 Message-ID: <20220224123903.5020-2-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220224123903.5020-1-akhilrajeev@nvidia.com> References: <20220224123903.5020-1-akhilrajeev@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3059f34c-e9ed-4e94-b713-08d9f792c4d7 X-MS-TrafficTypeDiagnostic: MN2PR12MB4303:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0ha8ryEibVFKZ+2/DFNKDGmghbJ1IaUgUkj9VCRMA5WDfXz9D4rUDhxmkiSc0mn1MnRWv6jwnMgG5FuPEULI7W7ymgxJOIq4LUswMSHOvR6+eZ717fR/S3X+WlBKR/dsKeFwVpY+i3fsFu3Qr4BicWMuCToVVFOHfWGccl4x9ZBBdDawRdKmJ6DjkHJ2sOZwYqfHuJ3YgvfiF8T/ELBRpDE7CyeKfDH1X2nzBwS3vh/zzr5qFIhE/sK1i/A5eVsE+hCXHJVEgIebiE199EKMh77HlGdTZoSF3NSKbFEw/G+Tz0FhrRJZceFuEMGOxc3ctKvQ+4IHPAXuoVFCJ+MJ/lf+hRY+uPwFQPVsMBsYkvKIbwal1l6+4Reca2TM7DFiw+VmoCRTRzosz1heSDyKdHwu+oDbqymGIYK1aI/j8po81/Avat3Biyd0kSmzpI3eVdbogr6UsgCBy7xAfQVSURhkdCc+pdiwhRa/A6aTYxyE2vvUoYp6ZP/TDFjiWc5UHx/Ev8jP3wS5V7u2HEM01dCa4KMi69TLBZq0clnPwypd8eBPNjHe5uXRgS9iHCbtNb5zX505Vqpz7QQqT1pcYEX3eFN/rjqEIcmd2yA/JkWBejHu0ahou5+FVP5OoRGxrDjFu9tFnhWUkcGK4sV/vMMCU/PrMonuNVOE/+88aRTyOErcLdVIZePMF2Uh9s3cWPTIc+g1pRY06IAJNG4sjV5V+TawByRkxO/yJhPKAlI6oKxXrlTOJGAmIMUW3lndUSf0055zs9BT/JcQoY1iO6dfES09SWJRqZYeGfsalgAFhHOleQ0r7XNwWNxqQL69Zy15gPCwcNun5E2cfStCJe6Li4IalYgJUUC1YHgQnr+XjOmHVGz5lGlmd1RAtxpr6/RF+OuIwnxZpPyRjAJh/w== X-Forefront-Antispam-Report: CIP:12.22.5.238;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(966005)(8936002)(110136005)(26005)(40460700003)(1076003)(2616005)(107886003)(86362001)(2906002)(426003)(336012)(36860700001)(5660300002)(36756003)(7696005)(508600001)(6666004)(316002)(82310400004)(47076005)(186003)(81166007)(921005)(356005)(4326008)(8676002)(83380400001)(70586007)(70206006)(2101003)(83996005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2022 12:39:58.8299 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3059f34c-e9ed-4e94-b713-08d9f792c4d7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.238];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4303 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT binding document for Nvidia Tegra GPCDMA controller. Signed-off-by: Rajesh Gumasta Signed-off-by: Akhil R Reviewed-by: Jon Hunter Reviewed-by: Rob Herring --- .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 110 ++++++++++++++++++ 1 file changed, 110 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml new file mode 100644 index 000000000000..9dd1476d1849 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings + +description: | + The Tegra General Purpose Central (GPC) DMA controller is used for faster + data transfers between memory to memory, memory to device and device to + memory. + +maintainers: + - Jon Hunter + - Rajesh Gumasta + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + oneOf: + - const: nvidia,tegra186-gpcdma + - items: + - const: nvidia,tegra194-gpcdma + - const: nvidia,tegra186-gpcdma + + "#dma-cells": + const: 1 + + reg: + maxItems: 1 + + interrupts: + description: + Should contain all of the per-channel DMA interrupts in + ascending order with respect to the DMA channel index. + minItems: 1 + maxItems: 31 + + resets: + maxItems: 1 + + reset-names: + const: gpcdma + + iommus: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg + - interrupts + - resets + - reset-names + - "#dma-cells" + - iommus + +additionalProperties: false + +examples: + - | + #include + #include + #include + + dma-controller@2600000 { + compatible = "nvidia,tegra186-gpcdma"; + reg = <0x2600000 0x210000>; + resets = <&bpmp TEGRA186_RESET_GPCDMA>; + reset-names = "gpcdma"; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + iommus = <&smmu TEGRA186_SID_GPCDMA_0>; + dma-coherent; + }; +... -- 2.17.1