From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DC8FC433F5 for ; Sat, 12 Mar 2022 23:04:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232855AbiCLXFP (ORCPT ); Sat, 12 Mar 2022 18:05:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230380AbiCLXFP (ORCPT ); Sat, 12 Mar 2022 18:05:15 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3DCB107; Sat, 12 Mar 2022 15:04:08 -0800 (PST) X-UUID: 0118ecaa309e488dbc658ec11bfe7a7c-20220313 X-UUID: 0118ecaa309e488dbc658ec11bfe7a7c-20220313 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1461796802; Sun, 13 Mar 2022 07:04:05 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sun, 13 Mar 2022 07:04:03 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 13 Mar 2022 07:04:03 +0800 From: Miles Chen To: CC: , , , , , , , , , , Subject: Re: [PATCH v3 04/15] clk: mediatek: Add MT8186 infrastructure clock support Date: Sun, 13 Mar 2022 07:04:03 +0800 Message-ID: <20220312230403.1682-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220311114229.32504-5-chun-jie.chen@mediatek.com> References: <20220311114229.32504-5-chun-jie.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org > Add MT8186 infrastructure clock controller which provides > clock gate control for basic IP like pwm, uart, spi and so on. > > Signed-off-by: Chun-Jie Chen > Acked-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen