* [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT
@ 2022-03-17 22:35 Alvin Šipraga
2022-03-17 22:35 ` [PATCH v2 2/2] clk: imx8mn: add GPT support Alvin Šipraga
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Alvin Šipraga @ 2022-03-17 22:35 UTC (permalink / raw)
To: Abel Vesa, Michael Turquette, Stephen Boyd, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Rob Herring
Cc: Alvin Šipraga, linux-clk, linux-arm-kernel, linux-kernel,
devicetree
From: Alvin Šipraga <alsi@bang-olufsen.dk>
The i.MX8MN has a General Purpose Timer (GPT) just like the i.MX8MM,
which already has such bindings. Add the relevant bindings for the Nano
SoC too.
Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk>
---
v1->v2: no changes
---
include/dt-bindings/clock/imx8mn-clock.h | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h
index 01e8bab1d767..07b8a282c268 100644
--- a/include/dt-bindings/clock/imx8mn-clock.h
+++ b/include/dt-bindings/clock/imx8mn-clock.h
@@ -243,6 +243,20 @@
#define IMX8MN_CLK_M7_CORE 221
-#define IMX8MN_CLK_END 222
+#define IMX8MN_CLK_GPT_3M 222
+#define IMX8MN_CLK_GPT1 223
+#define IMX8MN_CLK_GPT1_ROOT 224
+#define IMX8MN_CLK_GPT2 225
+#define IMX8MN_CLK_GPT2_ROOT 226
+#define IMX8MN_CLK_GPT3 227
+#define IMX8MN_CLK_GPT3_ROOT 228
+#define IMX8MN_CLK_GPT4 229
+#define IMX8MN_CLK_GPT4_ROOT 230
+#define IMX8MN_CLK_GPT5 231
+#define IMX8MN_CLK_GPT5_ROOT 232
+#define IMX8MN_CLK_GPT6 233
+#define IMX8MN_CLK_GPT6_ROOT 234
+
+#define IMX8MN_CLK_END 235
#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v2 2/2] clk: imx8mn: add GPT support 2022-03-17 22:35 [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Alvin Šipraga @ 2022-03-17 22:35 ` Alvin Šipraga 2022-03-18 13:37 ` [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Krzysztof Kozlowski ` (2 subsequent siblings) 3 siblings, 0 replies; 5+ messages in thread From: Alvin Šipraga @ 2022-03-17 22:35 UTC (permalink / raw) To: Abel Vesa, Michael Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Rob Herring Cc: Alvin Šipraga, linux-clk, linux-arm-kernel, linux-kernel, devicetree From: Alvin Šipraga <alsi@bang-olufsen.dk> Add support for the General Purpose Timer (GPT) clocks on the i.MX8MN. The i.MX8MN GPT IP block is the same as on the i.MX8MM, on which this patch is based. Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> --- v1->v2: for reasons of consistency, change lines of the form: static const char *const imx8mn_gpt... to static const char * const imx8mn_gpt... and adjust the indentation accordingly. --- drivers/clk/imx/clk-imx8mn.c | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 92fcbab4f5be..fb058cb38c27 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -227,6 +227,30 @@ static const char * const imx8mn_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys "sys_pll1_40m", "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; +static const char * const imx8mn_gpt1_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char * const imx8mn_gpt2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char * const imx8mn_gpt3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char * const imx8mn_gpt4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char * const imx8mn_gpt5_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char * const imx8mn_gpt6_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + static const char * const imx8mn_wdog_sels[] = {"osc_24m", "sys_pll1_133m", "sys_pll1_160m", "vpu_pll_out", "sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", }; @@ -476,6 +500,12 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) hws[IMX8MN_CLK_PWM2] = imx8m_clk_hw_composite("pwm2", imx8mn_pwm2_sels, base + 0xb400); hws[IMX8MN_CLK_PWM3] = imx8m_clk_hw_composite("pwm3", imx8mn_pwm3_sels, base + 0xb480); hws[IMX8MN_CLK_PWM4] = imx8m_clk_hw_composite("pwm4", imx8mn_pwm4_sels, base + 0xb500); + hws[IMX8MN_CLK_GPT1] = imx8m_clk_hw_composite("gpt1", imx8mn_gpt1_sels, base + 0xb580); + hws[IMX8MN_CLK_GPT2] = imx8m_clk_hw_composite("gpt2", imx8mn_gpt2_sels, base + 0xb600); + hws[IMX8MN_CLK_GPT3] = imx8m_clk_hw_composite("gpt3", imx8mn_gpt3_sels, base + 0xb680); + hws[IMX8MN_CLK_GPT4] = imx8m_clk_hw_composite("gpt4", imx8mn_gpt4_sels, base + 0xb700); + hws[IMX8MN_CLK_GPT5] = imx8m_clk_hw_composite("gpt5", imx8mn_gpt5_sels, base + 0xb780); + hws[IMX8MN_CLK_GPT6] = imx8m_clk_hw_composite("gpt6", imx8mn_gpt6_sels, base + 0xb800); hws[IMX8MN_CLK_WDOG] = imx8m_clk_hw_composite("wdog", imx8mn_wdog_sels, base + 0xb900); hws[IMX8MN_CLK_WRCLK] = imx8m_clk_hw_composite("wrclk", imx8mn_wrclk_sels, base + 0xb980); hws[IMX8MN_CLK_CLKO1] = imx8m_clk_hw_composite("clko1", imx8mn_clko1_sels, base + 0xba00); @@ -501,6 +531,12 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) hws[IMX8MN_CLK_GPIO3_ROOT] = imx_clk_hw_gate4("gpio3_root_clk", "ipg_root", base + 0x40d0, 0); hws[IMX8MN_CLK_GPIO4_ROOT] = imx_clk_hw_gate4("gpio4_root_clk", "ipg_root", base + 0x40e0, 0); hws[IMX8MN_CLK_GPIO5_ROOT] = imx_clk_hw_gate4("gpio5_root_clk", "ipg_root", base + 0x40f0, 0); + hws[IMX8MN_CLK_GPT1_ROOT] = imx_clk_hw_gate4("gpt1_root_clk", "gpt1", base + 0x4100, 0); + hws[IMX8MN_CLK_GPT2_ROOT] = imx_clk_hw_gate4("gpt2_root_clk", "gpt2", base + 0x4110, 0); + hws[IMX8MN_CLK_GPT3_ROOT] = imx_clk_hw_gate4("gpt3_root_clk", "gpt3", base + 0x4120, 0); + hws[IMX8MN_CLK_GPT4_ROOT] = imx_clk_hw_gate4("gpt4_root_clk", "gpt4", base + 0x4130, 0); + hws[IMX8MN_CLK_GPT5_ROOT] = imx_clk_hw_gate4("gpt5_root_clk", "gpt5", base + 0x4140, 0); + hws[IMX8MN_CLK_GPT6_ROOT] = imx_clk_hw_gate4("gpt6_root_clk", "gpt6", base + 0x4150, 0); hws[IMX8MN_CLK_I2C1_ROOT] = imx_clk_hw_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0); hws[IMX8MN_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0); hws[IMX8MN_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0); @@ -549,6 +585,8 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) hws[IMX8MN_CLK_SDMA3_ROOT] = imx_clk_hw_gate4("sdma3_clk", "ipg_audio_root", base + 0x45f0, 0); hws[IMX8MN_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root_clk", "sai7", base + 0x4650, 0, &share_count_sai7); + hws[IMX8MN_CLK_GPT_3M] = imx_clk_hw_fixed_factor("gpt_3m", "osc_24m", 1, 8); + hws[IMX8MN_CLK_DRAM_ALT_ROOT] = imx_clk_hw_fixed_factor("dram_alt_root", "dram_alt", 1, 4); hws[IMX8MN_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core", -- 2.35.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT 2022-03-17 22:35 [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Alvin Šipraga 2022-03-17 22:35 ` [PATCH v2 2/2] clk: imx8mn: add GPT support Alvin Šipraga @ 2022-03-18 13:37 ` Krzysztof Kozlowski 2022-04-08 11:48 ` Abel Vesa 2022-04-12 10:57 ` Abel Vesa 3 siblings, 0 replies; 5+ messages in thread From: Krzysztof Kozlowski @ 2022-03-18 13:37 UTC (permalink / raw) To: Alvin Šipraga, Abel Vesa, Michael Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Rob Herring Cc: Alvin Šipraga, linux-clk, linux-arm-kernel, linux-kernel, devicetree On 17/03/2022 23:35, Alvin Šipraga wrote: > From: Alvin Šipraga <alsi@bang-olufsen.dk> > > The i.MX8MN has a General Purpose Timer (GPT) just like the i.MX8MM, > which already has such bindings. Add the relevant bindings for the Nano > SoC too. > > Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> > --- > v1->v2: no changes > --- > include/dt-bindings/clock/imx8mn-clock.h | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT 2022-03-17 22:35 [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Alvin Šipraga 2022-03-17 22:35 ` [PATCH v2 2/2] clk: imx8mn: add GPT support Alvin Šipraga 2022-03-18 13:37 ` [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Krzysztof Kozlowski @ 2022-04-08 11:48 ` Abel Vesa 2022-04-12 10:57 ` Abel Vesa 3 siblings, 0 replies; 5+ messages in thread From: Abel Vesa @ 2022-04-08 11:48 UTC (permalink / raw) To: Alvin Šipraga Cc: Michael Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Rob Herring, Alvin Šipraga, linux-clk, linux-arm-kernel, linux-kernel, devicetree On 22-03-17 23:35:58, Alvin Šipraga wrote: > From: Alvin Šipraga <alsi@bang-olufsen.dk> > > The i.MX8MN has a General Purpose Timer (GPT) just like the i.MX8MM, > which already has such bindings. Add the relevant bindings for the Nano > SoC too. > > Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Looks OK to me. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> > --- > v1->v2: no changes > --- > include/dt-bindings/clock/imx8mn-clock.h | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h > index 01e8bab1d767..07b8a282c268 100644 > --- a/include/dt-bindings/clock/imx8mn-clock.h > +++ b/include/dt-bindings/clock/imx8mn-clock.h > @@ -243,6 +243,20 @@ > > #define IMX8MN_CLK_M7_CORE 221 > > -#define IMX8MN_CLK_END 222 > +#define IMX8MN_CLK_GPT_3M 222 > +#define IMX8MN_CLK_GPT1 223 > +#define IMX8MN_CLK_GPT1_ROOT 224 > +#define IMX8MN_CLK_GPT2 225 > +#define IMX8MN_CLK_GPT2_ROOT 226 > +#define IMX8MN_CLK_GPT3 227 > +#define IMX8MN_CLK_GPT3_ROOT 228 > +#define IMX8MN_CLK_GPT4 229 > +#define IMX8MN_CLK_GPT4_ROOT 230 > +#define IMX8MN_CLK_GPT5 231 > +#define IMX8MN_CLK_GPT5_ROOT 232 > +#define IMX8MN_CLK_GPT6 233 > +#define IMX8MN_CLK_GPT6_ROOT 234 > + > +#define IMX8MN_CLK_END 235 > > #endif > -- > 2.35.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT 2022-03-17 22:35 [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Alvin Šipraga ` (2 preceding siblings ...) 2022-04-08 11:48 ` Abel Vesa @ 2022-04-12 10:57 ` Abel Vesa 3 siblings, 0 replies; 5+ messages in thread From: Abel Vesa @ 2022-04-12 10:57 UTC (permalink / raw) To: Alvin Šipraga Cc: Michael Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Rob Herring, Alvin Šipraga, linux-clk, linux-arm-kernel, linux-kernel, devicetree On 22-03-17 23:35:58, Alvin Šipraga wrote: > From: Alvin Šipraga <alsi@bang-olufsen.dk> > > The i.MX8MN has a General Purpose Timer (GPT) just like the i.MX8MM, > which already has such bindings. Add the relevant bindings for the Nano > SoC too. > > Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Applied both. Thanks! > --- > v1->v2: no changes > --- > include/dt-bindings/clock/imx8mn-clock.h | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h > index 01e8bab1d767..07b8a282c268 100644 > --- a/include/dt-bindings/clock/imx8mn-clock.h > +++ b/include/dt-bindings/clock/imx8mn-clock.h > @@ -243,6 +243,20 @@ > > #define IMX8MN_CLK_M7_CORE 221 > > -#define IMX8MN_CLK_END 222 > +#define IMX8MN_CLK_GPT_3M 222 > +#define IMX8MN_CLK_GPT1 223 > +#define IMX8MN_CLK_GPT1_ROOT 224 > +#define IMX8MN_CLK_GPT2 225 > +#define IMX8MN_CLK_GPT2_ROOT 226 > +#define IMX8MN_CLK_GPT3 227 > +#define IMX8MN_CLK_GPT3_ROOT 228 > +#define IMX8MN_CLK_GPT4 229 > +#define IMX8MN_CLK_GPT4_ROOT 230 > +#define IMX8MN_CLK_GPT5 231 > +#define IMX8MN_CLK_GPT5_ROOT 232 > +#define IMX8MN_CLK_GPT6 233 > +#define IMX8MN_CLK_GPT6_ROOT 234 > + > +#define IMX8MN_CLK_END 235 > > #endif > -- > 2.35.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-04-12 12:00 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-03-17 22:35 [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Alvin Šipraga 2022-03-17 22:35 ` [PATCH v2 2/2] clk: imx8mn: add GPT support Alvin Šipraga 2022-03-18 13:37 ` [PATCH v2 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Krzysztof Kozlowski 2022-04-08 11:48 ` Abel Vesa 2022-04-12 10:57 ` Abel Vesa
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