From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DBF6C433F5 for ; Tue, 22 Mar 2022 07:46:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229458AbiCVHsJ (ORCPT ); Tue, 22 Mar 2022 03:48:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229454AbiCVHsI (ORCPT ); Tue, 22 Mar 2022 03:48:08 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C619EB7 for ; Tue, 22 Mar 2022 00:46:41 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=bjornoya.blackshift.org) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nWZDl-0000k1-JB; Tue, 22 Mar 2022 08:46:25 +0100 Received: from pengutronix.de (2a03-f580-87bc-d400-7c76-e54b-1dbb-9ff1.ip6.dokom21.de [IPv6:2a03:f580:87bc:d400:7c76:e54b:1dbb:9ff1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) (Authenticated sender: mkl-all@blackshift.org) by smtp.blackshift.org (Postfix) with ESMTPSA id 3DBDF511F6; Tue, 22 Mar 2022 07:46:23 +0000 (UTC) Date: Tue, 22 Mar 2022 08:46:22 +0100 From: Marc Kleine-Budde To: Pavel Pisa Cc: linux-can@vger.kernel.org, devicetree@vger.kernel.org, Oliver Hartkopp , Wolfgang Grandegger , David Miller , Rob Herring , mark.rutland@arm.com, Carsten Emde , armbru@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Marin Jerabek , Ondrej Ille , Jiri Novak , Jaroslav Beran , Petr Porazil , Pavel Machek , Drew Fustini Subject: Re: [PATCH v8 0/7] CTU CAN FD open-source IP core SocketCAN driver, PCI, platform integration and documentation Message-ID: <20220322074622.5gkjhs25epurecvx@pengutronix.de> References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="36z23q6udvpbfk4u" Content-Disposition: inline In-Reply-To: X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: mkl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --36z23q6udvpbfk4u Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 22.03.2022 00:32:27, Pavel Pisa wrote: > This driver adds support for the CTU CAN FD open-source IP core. > More documentation and core sources at project page > (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core). > The core integration to Xilinx Zynq system as platform driver > is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top= ). > Implementation on Intel FPGA based PCI Express board is available > from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd). > The CTU CAN FD core emulation send for review for QEMU mainline. > Development repository for QEMU emulation - ctu-canfd branch of > https://gitlab.fel.cvut.cz/canbus/qemu-canbus >=20 > More about CAN bus related projects used and developed at CTU FEE > on the guidepost page http://canbus.pages.fel.cvut.cz/ . The driver looks much better now. Good work. Please have a look at the TX path of the mcp251xfd driver, especially the tx_stop_queue and tx_wake_queue in mcp251xfd_start_xmit() and mcp251xfd_handle_tefif(). A lockless implementation should work in your hardware, too. BTW: The PROP_SEG/PHASE_SEG1 issue is known: > +A curious reader will notice that the durations of the segments PROP_SEG > +and PHASE_SEG1 are not determined separately but rather combined and > +then, by default, the resulting TSEG1 is evenly divided between PROP_SEG > +and PHASE_SEG1. and the flexcan IP core in CAN-FD mode has the same problem. When working on the bit timing parameter, I'll plan to have separate PROP_SEG/PHASE_SEG1 min/max in the kernel, so that the bit timing algorithm can take care of this. regards, Marc --=20 Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | --36z23q6udvpbfk4u Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEBsvAIBsPu6mG7thcrX5LkNig010FAmI5fswACgkQrX5LkNig 013PMQgAry/PkuGGU7GSA3xJRLELcIKOAuwmQaJF/J1/IKeEaZOtD6W/7ml1q9OX jpiKdNr/4kgkkEbmF4RpUJcu47Q3R4pYsKdu02b80vbul8tz+pc1vSrJdectiZgN 2Ni1L+fR78bnICKivXNyPBFRhmbwakBkEUihKIMipb9+r6i7EhzuEt2f9B7ENyin 3OtnjT9ilKigKGyWhzFgpVE1OVpZA6JuU4FeI5Tn1W1hq3oR7285Z9pI78++mC5a 2YRreiqXhywLExr46RWqEnnAqhQApJr8TLB323llhmzeYQcb/uz5RZhXKull3Lzx lAkWRDnyip0aWFAvXdpaSva9WQoFCg== =VfJn -----END PGP SIGNATURE----- --36z23q6udvpbfk4u--