From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-pci@vger.kernel.org
Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com,
lorenzo.pieralisi@arm.com, agross@kernel.org,
bjorn.andersson@linaro.org, svarbanov@mm-sol.com,
bhelgaas@google.com, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
robh+dt@kernel.org
Subject: [PATCH v4 0/2] pci: Add PCIe support for SM8150 SoC
Date: Sat, 26 Mar 2022 11:38:08 +0530 [thread overview]
Message-ID: <20220326060810.1797516-1-bhupesh.sharma@linaro.org> (raw)
Changes since v3:
-----------------
- v3 can be found here: https://lore.kernel.org/linux-arm-msm/20220302203045.184500-1-bhupesh.sharma@linaro.org/
- Broke down the patchset into 3 separate patchsets for each tree,
so that the patch(es) can be easily reviewed and merged by respective
maintainers.
- This patchset adds the driver / binding related PCIe support for
SM8150 SoC.
Hi Lorenzo,
This series adds driver / binding support for PCIe controllers found
on Qualcomm SM8150 SoC. There are 2 PCIe instances on this SoC each with
different PHYs. The PCIe controller and PHYs are mostly compatible with
the ones found on SM8250 SoC, hence the old drivers are modified to add
the support.
This series has been tested on SA8155p ADP board with QCA6696 chipset connected
onboard.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: lorenzo.pieralisi@arm.com
Bhupesh Sharma (2):
dt-bindings: pci: qcom: Document PCIe bindings for SM8150 SoC
PCI: qcom: Add SM8150 SoC support
Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++--
drivers/pci/controller/dwc/pcie-qcom.c | 8 ++++++++
2 files changed, 11 insertions(+), 2 deletions(-)
--
2.35.1
next reply other threads:[~2022-03-26 6:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-26 6:08 Bhupesh Sharma [this message]
2022-03-26 6:08 ` [PATCH v4 1/2] dt-bindings: pci: qcom: Document PCIe bindings for SM8150 SoC Bhupesh Sharma
2022-03-26 6:08 ` [PATCH v4 2/2] PCI: qcom: Add SM8150 SoC support Bhupesh Sharma
2022-04-08 10:49 ` [PATCH v4 0/2] pci: Add PCIe support for SM8150 SoC Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220326060810.1797516-1-bhupesh.sharma@linaro.org \
--to=bhupesh.sharma@linaro.org \
--cc=agross@kernel.org \
--cc=bhelgaas@google.com \
--cc=bhupesh.linux@gmail.com \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=robh+dt@kernel.org \
--cc=svarbanov@mm-sol.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).