From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 916BCC4321E for ; Thu, 31 Mar 2022 15:47:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236395AbiCaPsv (ORCPT ); Thu, 31 Mar 2022 11:48:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239578AbiCaPsO (ORCPT ); Thu, 31 Mar 2022 11:48:14 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 94E9955751 for ; Thu, 31 Mar 2022 08:44:56 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 512D2139F; Thu, 31 Mar 2022 08:44:56 -0700 (PDT) Received: from donnerap.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3248A3F73B; Thu, 31 Mar 2022 08:44:55 -0700 (PDT) Date: Thu, 31 Mar 2022 16:44:52 +0100 From: Andre Przywara To: Rui Miguel Silva Cc: Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3 1/3] dt-bindings: net: smsc,lan91c111 convert to schema Message-ID: <20220331164452.094a9308@donnerap.cambridge.arm.com> In-Reply-To: <20220330131053.1122502-2-rui.silva@linaro.org> References: <20220330131053.1122502-1-rui.silva@linaro.org> <20220330131053.1122502-2-rui.silva@linaro.org> Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, 30 Mar 2022 14:10:51 +0100 Rui Miguel Silva wrote: Hi, > Convert the smsc lan91c9x and lan91c1xx controller device tree > bindings documentation to json-schema. > > Signed-off-by: Rui Miguel Silva > --- > .../bindings/net/smsc,lan91c111.yaml | 61 +++++++++++++++++++ > .../bindings/net/smsc-lan91c111.txt | 17 ------ > 2 files changed, 61 insertions(+), 17 deletions(-) > create mode 100644 Documentation/devicetree/bindings/net/smsc,lan91c111.yaml > delete mode 100644 Documentation/devicetree/bindings/net/smsc-lan91c111.txt > > diff --git a/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml b/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml > new file mode 100644 > index 000000000000..1730284430bc > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml > @@ -0,0 +1,61 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/smsc,lan91c111.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller > + > +maintainers: > + - Nicolas Pitre > + > +allOf: > + - $ref: ethernet-controller.yaml# > + > +properties: > + compatible: > + const: smsc,lan91c111 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + reg-shift: true > + > + reg-io-width: > + enum: [ 1, 2, 4 ] The old binding spoke of a possible mask, so you could have "6" here to signify that your hardware can do both 16 and 32-bit accesses, IIUC. And from quickly glancing through the Linux driver it seems to support this idea as well. So shall this be: minimum: 1 maximum: 7 instead? > + default: 4 The old binding said: "If it's omitted or invalid, the size would be 2 meaning 16-bit access only". That's also what the Linux driver implements. So this shall be: "default: 2" then? > + > + reset-gpios: > + description: GPIO connected to control RESET pin > + maxItems: 1 > + > + power-gpios: > + description: GPIO connect to control PWRDEWN pin connected Rest looks fine to me, and passes dt_binding_check. Cheers, Andre > + maxItems: 1 > + > + pxa-u16-align4: > + description: put in place the workaround the force all u16 writes to be > + 32 bits aligned > + type: boolean > + > +required: > + - compatible > + - reg > + - interrupts > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + > + ethernet@4010000 { > + compatible = "smsc,lan91c111"; > + reg = <0x40100000 0x10000>; > + phy-mode = "mii"; > + interrupts = ; > + reg-io-width = <2>; > + }; > diff --git a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt b/Documentation/devicetree/bindings/net/smsc-lan91c111.txt > deleted file mode 100644 > index 309e37eb7c7c..000000000000 > --- a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt > +++ /dev/null > @@ -1,17 +0,0 @@ > -SMSC LAN91c111 Ethernet mac > - > -Required properties: > -- compatible = "smsc,lan91c111"; > -- reg : physical address and size of registers > -- interrupts : interrupt connection > - > -Optional properties: > -- phy-device : see ethernet.txt file in the same directory > -- reg-io-width : Mask of sizes (in bytes) of the IO accesses that > - are supported on the device. Valid value for SMSC LAN91c111 are > - 1, 2 or 4. If it's omitted or invalid, the size would be 2 meaning > - 16-bit access only. > -- power-gpios: GPIO to control the PWRDWN pin > -- reset-gpios: GPIO to control the RESET pin > -- pxa-u16-align4 : Boolean, put in place the workaround the force all > - u16 writes to be 32 bits aligned