From: Sumit Gupta <sumitg@nvidia.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
<robh+dt@kernel.org>, <krzk+dt@kernel.org>, <treding@nvidia.com>,
<jonathanh@nvidia.com>, <linux-pm@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <ksitaraman@nvidia.com>, <sanjayc@nvidia.com>, <bbasu@nvidia.com>,
<sumitg@nvidia.com>
Subject: [Patch v4 1/4] dt-bindings: Document Tegra CCPLEX Cluster
Date: Tue, 5 Apr 2022 18:31:16 +0530 [thread overview]
Message-ID: <20220405130119.4697-2-sumitg@nvidia.com> (raw)
In-Reply-To: <20220405130119.4697-1-sumitg@nvidia.com>
The Tegra CPU COMPLEX CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
.../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++
1 file changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
new file mode 100644
index 000000000000..8c6543b5c0dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: NVIDIA Tegra CPU COMPLEX CLUSTER area device tree bindings
+
+maintainers:
+ - Sumit Gupta <sumitg@nvidia.com>
+ - Mikko Perttunen <mperttunen@nvidia.com>
+ - Jon Hunter <jonathanh@nvidia.com>
+ - Thierry Reding <thierry.reding@gmail.com>
+
+description: |+
+ The Tegra CPU COMPLEX CLUSTER area contains memory-mapped
+ registers that initiate CPU frequency/voltage transitions.
+
+properties:
+ $nodename:
+ pattern: "ccplex@([0-9a-f]+)$"
+
+ compatible:
+ enum:
+ - nvidia,tegra186-ccplex-cluster
+ - nvidia,tegra234-ccplex-cluster
+
+ reg:
+ maxItems: 1
+
+ nvidia,bpmp:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Specifies the BPMP node that needs to be queried to get
+ operating point data for all CPUs.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - nvidia,bpmp
+ - status
+
+examples:
+ - |
+ ccplex@e000000 {
+ compatible = "nvidia,tegra234-ccplex-cluster";
+ reg = <0x0e000000 0x5ffff>;
+ nvidia,bpmp = <&bpmp>;
+ status = "okay";
+ };
--
2.17.1
next prev parent reply other threads:[~2022-04-05 15:23 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-05 13:01 [Patch v4 0/4] Tegra234 cpufreq driver support Sumit Gupta
2022-04-05 13:01 ` Sumit Gupta [this message]
2022-04-06 18:51 ` [Patch v4 1/4] dt-bindings: Document Tegra CCPLEX Cluster Rob Herring
2022-04-05 13:01 ` [Patch v4 2/4] cpufreq: tegra194: add soc data to support multiple soc Sumit Gupta
2022-04-05 13:01 ` [Patch v4 3/4] cpufreq: tegra194: Add support for Tegra234 Sumit Gupta
2022-04-05 13:01 ` [Patch v4 4/4] arm64: tegra: add node for tegra234 cpufreq Sumit Gupta
2022-04-11 3:00 ` [Patch v4 0/4] Tegra234 cpufreq driver support Viresh Kumar
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