devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Conor Dooley <conor.dooley@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<aou@eecs.berkeley.edu>, <paul.walmsley@sifive.com>,
	<palmer@rivosinc.com>, <a.zummo@towertech.it>,
	<alexandre.belloni@bootlin.com>, <robh+dt@kernel.org>,
	<krzk+dt@kernel.org>
Cc: <daire.mcnamara@microchip.com>, <linux-rtc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v1 0/7] Add rtc refclk support for PolarFire SoC
Date: Fri, 8 Apr 2022 14:36:40 +0000	[thread overview]
Message-ID: <20220408143646.3693104-1-conor.dooley@microchip.com> (raw)

Hey,
As I mentioned in my fixes for 5.18 [0], found out that the reference
clock for the rtc is actually missing from the clock driver (and the
dt binding). 

Currently the mpfs clock driver uses a reference clock called the
"msspll", set in the device tree, as the parent for the cpu/axi/ahb
(config) clocks. The frequency of the msspll is determined by the FPGA
bitstream & the bootloader configures the clock to match the bitstream.
The real reference is provided by a 100 or 125 MHz off chip oscillator.

However, the msspll clock is not actually the parent of all clocks on
the system - the reference clock for the rtc/mtimer actually has the
off chip oscillator as its parent.

This series enables reading the rate of the msspll clock, converts
the refclock in the device tree to the external reference & adds
the missing rtc reference clock.

I assume it is okay not to add fixes tags for the rtc dt binding?
Since the clock was previously missing, the binding is wrong, but
idk if that qualifies as a fix?

Clock driver changes depend on the fixes I sent in [0].
Please lmk if you want me to respin into a single series w/ the fixes.
Thanks,
Conor.

[0]: https://lore.kernel.org/linux-riscv/20220408133543.3537118-1-conor.dooley@microchip.com/

Conor Dooley (7):
  dt-bindings: clk: mpfs document msspll dri registers
  dt-bindings: clk: mpfs: add defines for two new clocks
  dt-bindings: rtc: add refclk to mpfs-rtc
  clk: microchip: mpfs: re-parent the configurable clocks
  clk: microchip: mpfs: rename sys_base to base
  clk: microchip: mpfs: add RTCREF clock control
  riscv: dts: microchip: reparent mpfs clocks

 .../bindings/clock/microchip,mpfs.yaml        |  11 +-
 .../bindings/rtc/microchip,mfps-rtc.yaml      |  14 +-
 .../microchip/microchip-mpfs-icicle-kit.dts   |   2 +-
 .../boot/dts/microchip/microchip-mpfs.dtsi    |   8 +-
 drivers/clk/microchip/clk-mpfs.c              | 205 +++++++++++++++---
 .../dt-bindings/clock/microchip,mpfs-clock.h  |   5 +-
 6 files changed, 199 insertions(+), 46 deletions(-)

-- 
2.35.1


             reply	other threads:[~2022-04-08 14:37 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-08 14:36 Conor Dooley [this message]
2022-04-08 14:36 ` [PATCH v1 1/7] dt-bindings: clk: mpfs document msspll dri registers Conor Dooley
2022-04-08 14:54   ` Krzysztof Kozlowski
2022-04-08 14:36 ` [PATCH v1 2/7] dt-bindings: clk: mpfs: add defines for two new clocks Conor Dooley
2022-04-08 14:36 ` [PATCH v1 3/7] dt-bindings: rtc: add refclk to mpfs-rtc Conor Dooley
2022-04-08 14:56   ` Krzysztof Kozlowski
2022-04-08 14:36 ` [PATCH v1 4/7] clk: microchip: mpfs: re-parent the configurable clocks Conor Dooley
2022-04-08 14:36 ` [PATCH v1 5/7] clk: microchip: mpfs: rename sys_base to base Conor Dooley
2022-04-08 14:36 ` [PATCH v1 6/7] clk: microchip: mpfs: add RTCREF clock control Conor Dooley
2022-04-08 14:36 ` [PATCH v1 7/7] riscv: dts: microchip: reparent mpfs clocks Conor Dooley
2022-04-08 14:57 ` [PATCH v1 0/7] Add rtc refclk support for PolarFire SoC Krzysztof Kozlowski
2022-04-08 15:29   ` Conor Dooley
2022-04-09  7:14     ` Conor Dooley
2022-04-09 10:48       ` Krzysztof Kozlowski
2022-04-09 20:17         ` Conor Dooley
2022-04-10  8:12           ` Krzysztof Kozlowski
2022-04-09 10:45     ` Krzysztof Kozlowski

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220408143646.3693104-1-conor.dooley@microchip.com \
    --to=conor.dooley@microchip.com \
    --cc=a.zummo@towertech.it \
    --cc=alexandre.belloni@bootlin.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=daire.mcnamara@microchip.com \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-rtc@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=palmer@rivosinc.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).