From: "Clément Léger" <clement.leger@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>
Cc: "Clément Léger" <clement.leger@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Herve Codina" <herve.codina@bootlin.com>,
"Miquèl Raynal" <miquel.raynal@bootlin.com>,
"Milan Stevanovic" <milan.stevanovic@se.com>,
"Jimmy Lalande" <jimmy.lalande@se.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org
Subject: [PATCH net-next 02/12] net: dsa: add Renesas RZ/N1 switch tag driver
Date: Thu, 14 Apr 2022 14:22:40 +0200 [thread overview]
Message-ID: <20220414122250.158113-3-clement.leger@bootlin.com> (raw)
In-Reply-To: <20220414122250.158113-1-clement.leger@bootlin.com>
The switch that is present on the Renesas RZ/N1 SoC uses a specific
VLAN value followed by 6 bytes which contains forwarding configuration.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
net/dsa/Kconfig | 8 +++
net/dsa/Makefile | 1 +
net/dsa/tag_rzn1_a5psw.c | 112 +++++++++++++++++++++++++++++++++++++++
3 files changed, 121 insertions(+)
create mode 100644 net/dsa/tag_rzn1_a5psw.c
diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig
index 8cb87b5067ee..e5b17108fa22 100644
--- a/net/dsa/Kconfig
+++ b/net/dsa/Kconfig
@@ -132,6 +132,13 @@ config NET_DSA_TAG_RTL8_4
Say Y or M if you want to enable support for tagging frames for Realtek
switches with 8 byte protocol 4 tags, such as the Realtek RTL8365MB-VC.
+config NET_DSA_TAG_RZN1_A5PSW
+ tristate "Tag driver for Renesas RZ/N1 A5PSW switch"
+ help
+ Say Y or M if you want to enable support for tagging frames for
+ Renesas RZ/N1 embedded switch that uses a 8 byte tag located after
+ destination MAC address.
+
config NET_DSA_TAG_LAN9303
tristate "Tag driver for SMSC/Microchip LAN9303 family of switches"
help
@@ -159,4 +166,5 @@ config NET_DSA_TAG_XRS700X
Say Y or M if you want to enable support for tagging frames for
Arrow SpeedChips XRS700x switches that use a single byte tag trailer.
+
endif
diff --git a/net/dsa/Makefile b/net/dsa/Makefile
index 9f75820e7c98..af28c24ead18 100644
--- a/net/dsa/Makefile
+++ b/net/dsa/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_NET_DSA_TAG_OCELOT_8021Q) += tag_ocelot_8021q.o
obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o
obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
obj-$(CONFIG_NET_DSA_TAG_RTL8_4) += tag_rtl8_4.o
+obj-$(CONFIG_NET_DSA_TAG_RZN1_A5PSW) += tag_rzn1_a5psw.o
obj-$(CONFIG_NET_DSA_TAG_SJA1105) += tag_sja1105.o
obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
obj-$(CONFIG_NET_DSA_TAG_XRS700X) += tag_xrs700x.o
diff --git a/net/dsa/tag_rzn1_a5psw.c b/net/dsa/tag_rzn1_a5psw.c
new file mode 100644
index 000000000000..7818c1c0fca2
--- /dev/null
+++ b/net/dsa/tag_rzn1_a5psw.c
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2022 Schneider Electric
+ *
+ * Clément Léger <clement.leger@bootlin.com>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/etherdevice.h>
+#include <net/dsa.h>
+
+#include "dsa_priv.h"
+
+/* To define the outgoing port and to discover the incoming port a TAG is
+ * inserted after Src MAC :
+ *
+ * Dest MAC Src MAC TAG Type
+ * ...| 1 2 3 4 5 6 | 1 2 3 4 5 6 | 1 2 3 4 5 6 7 8 | 1 2 |...
+ * |<--------------->|
+ *
+ * See struct a5psw_tag for layout
+ */
+
+#define A5PSW_TAG_VALUE 0xE001
+#define A5PSW_TAG_LEN 8
+#define A5PSW_CTRL_DATA_FORCE_FORWARD BIT(0)
+/* This is both used for xmit tag and rcv tagging */
+#define A5PSW_CTRL_DATA_PORT GENMASK(3, 0)
+
+struct a5psw_tag {
+ u16 ctrl_tag;
+ u16 ctrl_data;
+ u32 ctrl_data2;
+};
+
+static struct sk_buff *a5psw_tag_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+ struct a5psw_tag *ptag, tag = {0};
+ struct dsa_port *dp = dsa_slave_to_port(dev);
+ u32 data2_val;
+
+ /* The Ethernet switch we are interfaced with needs packets to be at
+ * least 64 bytes (including FCS) otherwise they will be discarded when
+ * they enter the switch port logic. When tagging is enabled, we need
+ * to make sure that packets are at least 68 bytes (including FCS and
+ * tag).
+ */
+ if (__skb_put_padto(skb, ETH_ZLEN + sizeof(tag), false))
+ return NULL;
+
+ /* provide 'A5PSW_TAG_LEN' bytes additional space */
+ skb_push(skb, A5PSW_TAG_LEN);
+
+ /* make room between MACs and Ether-Type to insert tag */
+ dsa_alloc_etype_header(skb, A5PSW_TAG_LEN);
+
+ ptag = dsa_etype_header_pos_tx(skb);
+
+ data2_val = FIELD_PREP(A5PSW_CTRL_DATA_PORT, BIT(dp->index));
+ tag.ctrl_tag = htons(A5PSW_TAG_VALUE);
+ tag.ctrl_data = htons(A5PSW_CTRL_DATA_FORCE_FORWARD);
+ tag.ctrl_data2 = htonl(data2_val);
+
+ memcpy(ptag, &tag, sizeof(struct a5psw_tag));
+
+ return skb;
+}
+
+static struct sk_buff *a5psw_tag_rcv(struct sk_buff *skb,
+ struct net_device *dev)
+{
+ struct a5psw_tag *tag;
+ int port;
+
+ if (unlikely(!pskb_may_pull(skb, A5PSW_TAG_LEN))) {
+ dev_warn_ratelimited(&dev->dev,
+ "Dropping packet, cannot pull\n");
+ return NULL;
+ }
+
+ tag = dsa_etype_header_pos_rx(skb);
+
+ if (tag->ctrl_tag != htons(A5PSW_TAG_VALUE)) {
+ dev_warn_ratelimited(&dev->dev, "Dropping packet due to invalid TAG marker\n");
+ return NULL;
+ }
+
+ port = FIELD_GET(A5PSW_CTRL_DATA_PORT, ntohs(tag->ctrl_data));
+
+ skb->dev = dsa_master_find_slave(dev, 0, port);
+ if (!skb->dev)
+ return NULL;
+
+ skb_pull_rcsum(skb, A5PSW_TAG_LEN);
+ dsa_strip_etype_header(skb, A5PSW_TAG_LEN);
+
+ dsa_default_offload_fwd_mark(skb);
+
+ return skb;
+}
+
+static const struct dsa_device_ops a5psw_netdev_ops = {
+ .name = "a5psw",
+ .proto = DSA_TAG_PROTO_RZN1_A5PSW,
+ .xmit = a5psw_tag_xmit,
+ .rcv = a5psw_tag_rcv,
+ .needed_headroom = A5PSW_TAG_LEN,
+};
+
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_A5PSW);
+module_dsa_tag_driver(a5psw_netdev_ops);
--
2.34.1
next prev parent reply other threads:[~2022-04-14 12:25 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-14 12:22 [PATCH net-next 00/12] add support for Renesas RZ/N1 ethernet subsystem devices Clément Léger
2022-04-14 12:22 ` [PATCH net-next 01/12] net: dsa: add support for Renesas RZ/N1 A5PSW switch tag code Clément Léger
2022-04-14 13:44 ` Vladimir Oltean
2022-04-14 12:22 ` Clément Léger [this message]
2022-04-14 14:22 ` [PATCH net-next 02/12] net: dsa: add Renesas RZ/N1 switch tag driver Vladimir Oltean
2022-04-14 14:35 ` Clément Léger
2022-04-14 15:11 ` Vladimir Oltean
2022-04-14 16:18 ` Clément Léger
2022-04-14 16:23 ` Russell King (Oracle)
2022-04-15 7:23 ` Clément Léger
2022-04-14 22:50 ` Andrew Lunn
2022-04-14 12:22 ` [PATCH net-next 03/12] dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter Clément Léger
2022-04-14 18:59 ` Rob Herring
2022-04-19 13:43 ` Rob Herring
2022-04-19 15:00 ` Clément Léger
2022-04-20 20:11 ` Rob Herring
2022-04-21 7:35 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 04/12] net: pcs: add Renesas MII converter driver Clément Léger
2022-04-14 12:49 ` Russell King (Oracle)
2022-04-14 15:14 ` Clément Léger
2022-04-20 13:25 ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 05/12] dt-bindings: net: dsa: add bindings for Renesas RZ/N1 Advanced 5 port switch Clément Léger
2022-04-14 18:59 ` Rob Herring
2022-04-27 12:20 ` Geert Uytterhoeven
2022-04-27 12:56 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 06/12] net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver Clément Léger
2022-04-14 13:02 ` Russell King (Oracle)
2022-04-15 8:40 ` Clément Léger
2022-04-15 8:52 ` Russell King (Oracle)
2022-04-14 14:47 ` Vladimir Oltean
2022-04-14 17:51 ` Andrew Lunn
2022-04-15 9:34 ` Clément Léger
2022-04-15 10:55 ` Vladimir Oltean
2022-04-15 11:02 ` Russell King (Oracle)
2022-04-15 11:14 ` Vladimir Oltean
2022-04-15 11:23 ` Russell King (Oracle)
2022-04-15 12:01 ` Vladimir Oltean
2022-04-15 11:05 ` Vladimir Oltean
2022-04-15 12:31 ` Clément Léger
2022-04-15 12:28 ` Clément Léger
2022-04-15 12:41 ` Vladimir Oltean
2022-04-14 17:55 ` Andrew Lunn
2022-04-15 12:33 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 07/12] net: dsa: rzn1-a5psw: add statistics support Clément Léger
2022-04-14 17:34 ` Vladimir Oltean
2022-04-15 12:42 ` Clément Léger
2022-04-14 23:16 ` Andrew Lunn
2022-04-15 12:04 ` Clément Léger
2022-04-15 13:37 ` Andrew Lunn
2022-04-15 13:44 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 08/12] net: dsa: rzn1-a5psw: add FDB support Clément Léger
2022-04-14 17:51 ` Vladimir Oltean
2022-04-20 8:16 ` Clément Léger
2022-04-20 19:52 ` Vladimir Oltean
2022-04-21 7:38 ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 09/12] ARM: dts: r9a06g032: describe MII converter Clément Léger
2022-04-14 23:22 ` Andrew Lunn
2022-04-15 8:24 ` Clément Léger
2022-04-15 14:16 ` Andrew Lunn
2022-04-15 14:38 ` Clément Léger
2022-04-15 15:12 ` Andrew Lunn
2022-04-15 15:29 ` Clément Léger
2022-04-15 16:19 ` Andrew Lunn
2022-04-15 16:45 ` Clément Léger
2022-04-16 13:48 ` Andrew Lunn
2022-04-19 9:03 ` Clément Léger
2022-04-19 12:57 ` Andrew Lunn
2022-04-20 20:16 ` Rob Herring
2022-04-14 12:22 ` [PATCH net-next 10/12] ARM: dts: r9a06g032: describe GMAC2 Clément Léger
2022-04-21 9:31 ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 11/12] ARM: dts: r9a06g032: describe switch Clément Léger
2022-04-21 9:34 ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 12/12] MAINTAINERS: add Renesas RZ/N1 switch related driver entry Clément Léger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220414122250.158113-3-clement.leger@bootlin.com \
--to=clement.leger@bootlin.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=f.fainelli@gmail.com \
--cc=geert+renesas@glider.be \
--cc=herve.codina@bootlin.com \
--cc=hkallweit1@gmail.com \
--cc=jimmy.lalande@se.com \
--cc=krzk+dt@kernel.org \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=magnus.damm@gmail.com \
--cc=milan.stevanovic@se.com \
--cc=miquel.raynal@bootlin.com \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=pabeni@redhat.com \
--cc=robh+dt@kernel.org \
--cc=thomas.petazzoni@bootlin.com \
--cc=vivien.didelot@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).