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From: "Clément Léger" <clement.leger@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S . Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>
Cc: "Clément Léger" <clement.leger@bootlin.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Herve Codina" <herve.codina@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	"Milan Stevanovic" <milan.stevanovic@se.com>,
	"Jimmy Lalande" <jimmy.lalande@se.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org
Subject: [PATCH net-next 08/12] net: dsa: rzn1-a5psw: add FDB support
Date: Thu, 14 Apr 2022 14:22:46 +0200	[thread overview]
Message-ID: <20220414122250.158113-9-clement.leger@bootlin.com> (raw)
In-Reply-To: <20220414122250.158113-1-clement.leger@bootlin.com>

This commits add forwarding database support to the driver. It
implements fdb_add(), fdb_del() and fdb_dump().

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
 drivers/net/dsa/rzn1_a5psw.c | 163 +++++++++++++++++++++++++++++++++++
 drivers/net/dsa/rzn1_a5psw.h |  16 ++++
 2 files changed, 179 insertions(+)

diff --git a/drivers/net/dsa/rzn1_a5psw.c b/drivers/net/dsa/rzn1_a5psw.c
index 7ab7d9054427..8c763c2a1a1f 100644
--- a/drivers/net/dsa/rzn1_a5psw.c
+++ b/drivers/net/dsa/rzn1_a5psw.c
@@ -369,6 +369,166 @@ static void a5psw_port_fast_age(struct dsa_switch *ds, int port)
 	a5psw_port_fdb_flush(a5psw, port);
 }
 
+static int a5psw_lk_execute_lookup(struct a5psw *a5psw, union lk_data *lk_data,
+				   u16 *entry)
+{
+	u32 ctrl;
+	int ret;
+
+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_LO, lk_data->lo);
+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_HI, lk_data->hi);
+
+	ctrl = A5PSW_LK_ADDR_CTRL_LOOKUP;
+	ret = a5psw_lk_execute_ctrl(a5psw, &ctrl);
+	if (ret)
+		return ret;
+
+	*entry = ctrl & A5PSW_LK_ADDR_CTRL_ADDRESS;
+
+	return 0;
+}
+
+static int a5psw_port_fdb_add(struct dsa_switch *ds, int port,
+			      const unsigned char *addr, u16 vid,
+			      struct dsa_db db)
+{
+	struct a5psw *a5psw = ds->priv;
+	union lk_data lk_data = {0};
+	bool inc_learncount = false;
+	int ret = 0;
+	u16 entry;
+	u32 reg;
+
+	ether_addr_copy(lk_data.entry.mac, addr);
+	lk_data.entry.port_mask = BIT(port);
+
+	spin_lock(&a5psw->lk_lock);
+
+	/* Set the value to be written in the lookup table */
+	ret = a5psw_lk_execute_lookup(a5psw, &lk_data, &entry);
+	if (ret)
+		goto lk_unlock;
+
+	lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI);
+	if (!lk_data.entry.valid) {
+		inc_learncount = true;
+		/* port_mask set to 0x1f when entry is not valid, clear it */
+		lk_data.entry.port_mask = 0;
+		lk_data.entry.prio = 0;
+	}
+
+	lk_data.entry.port_mask |= BIT(port);
+	lk_data.entry.is_static = 1;
+	lk_data.entry.valid = 1;
+
+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_HI, lk_data.hi);
+
+	reg = A5PSW_LK_ADDR_CTRL_WRITE | entry;
+	ret = a5psw_lk_execute_ctrl(a5psw, &reg);
+	if (ret)
+		goto lk_unlock;
+
+	if (inc_learncount) {
+		reg = A5PSW_LK_LEARNCOUNT_MODE_INC;
+		a5psw_reg_writel(a5psw, A5PSW_LK_LEARNCOUNT, reg);
+	}
+
+lk_unlock:
+	spin_unlock(&a5psw->lk_lock);
+
+	return ret;
+}
+
+static int a5psw_port_fdb_del(struct dsa_switch *ds, int port,
+			      const unsigned char *addr, u16 vid,
+			      struct dsa_db db)
+{
+	struct a5psw *a5psw = ds->priv;
+	union lk_data lk_data = {0};
+	bool clear = false;
+	int ret = 0;
+	u16 entry;
+	u32 reg;
+
+	ether_addr_copy(lk_data.entry.mac, addr);
+
+	spin_lock(&a5psw->lk_lock);
+
+	ret = a5psw_lk_execute_lookup(a5psw, &lk_data, &entry);
+	if (ret) {
+		dev_err(a5psw->dev, "Failed to lookup mac address\n");
+		goto lk_unlock;
+	}
+
+	lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI);
+	if (!lk_data.entry.valid) {
+		dev_err(a5psw->dev, "Tried to remove non-existing entry\n");
+		ret = -ENOENT;
+		goto lk_unlock;
+	}
+
+	lk_data.entry.port_mask &= ~BIT(port);
+	/* If there is no more port in the mask, clear the entry */
+	if (lk_data.entry.port_mask == 0)
+		clear = true;
+
+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_HI, lk_data.hi);
+
+	reg = entry;
+	if (clear)
+		reg |= A5PSW_LK_ADDR_CTRL_CLEAR;
+	else
+		reg |= A5PSW_LK_ADDR_CTRL_WRITE;
+
+	ret = a5psw_lk_execute_ctrl(a5psw, &reg);
+	if (ret)
+		goto lk_unlock;
+
+	/* Decrement LEARNCOUNT */
+	if (clear) {
+		reg = A5PSW_LK_LEARNCOUNT_MODE_DEC;
+		a5psw_reg_writel(a5psw, A5PSW_LK_LEARNCOUNT, reg);
+	}
+
+lk_unlock:
+	spin_unlock(&a5psw->lk_lock);
+
+	return ret;
+}
+
+static int a5psw_port_fdb_dump(struct dsa_switch *ds, int port,
+			       dsa_fdb_dump_cb_t *cb, void *data)
+{
+	struct a5psw *a5psw = ds->priv;
+	union lk_data lk_data;
+	int i = 0, ret;
+	u32 reg;
+
+	for (i = 0; i < A5PSW_TABLE_ENTRIES; i++) {
+		reg = A5PSW_LK_ADDR_CTRL_READ | A5PSW_LK_ADDR_CTRL_WAIT | i;
+		spin_lock(&a5psw->lk_lock);
+
+		ret = a5psw_lk_execute_ctrl(a5psw, &reg);
+		if (ret)
+			return ret;
+
+		lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI);
+		/* If entry is not valid or does not contain the port, skip */
+		if (!lk_data.entry.valid ||
+		    !(lk_data.entry.port_mask & BIT(port))) {
+			spin_unlock(&a5psw->lk_lock);
+			continue;
+		}
+
+		lk_data.lo = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_LO);
+		spin_unlock(&a5psw->lk_lock);
+
+		cb(lk_data.entry.mac, 0, lk_data.entry.is_static, data);
+	}
+
+	return 0;
+}
+
 static void a5psw_get_strings(struct dsa_switch *ds, int port, u32 stringset,
 			      uint8_t *data)
 {
@@ -500,6 +660,9 @@ const struct dsa_switch_ops a5psw_switch_ops = {
 	.port_bridge_leave = a5psw_port_bridge_leave,
 	.port_stp_state_set = a5psw_port_stp_state_set,
 	.port_fast_age = a5psw_port_fast_age,
+	.port_fdb_add = a5psw_port_fdb_add,
+	.port_fdb_del = a5psw_port_fdb_del,
+	.port_fdb_dump = a5psw_port_fdb_dump,
 
 };
 
diff --git a/drivers/net/dsa/rzn1_a5psw.h b/drivers/net/dsa/rzn1_a5psw.h
index b34ea549e936..37aa89383e70 100644
--- a/drivers/net/dsa/rzn1_a5psw.h
+++ b/drivers/net/dsa/rzn1_a5psw.h
@@ -167,6 +167,22 @@
 #define A5PSW_CTRL_TIMEOUT		1000
 #define A5PSW_TABLE_ENTRIES		8192
 
+struct fdb_entry {
+	u8 mac[ETH_ALEN];
+	u8 valid:1;
+	u8 is_static:1;
+	u8 prio:3;
+	u8 port_mask:5;
+} __packed;
+
+union lk_data {
+	struct {
+		u32 lo;
+		u32 hi;
+	};
+	struct fdb_entry entry;
+};
+
 /**
  * struct a5psw - switch struct
  * @base: Base address of the switch
-- 
2.34.1


  parent reply	other threads:[~2022-04-14 12:26 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-14 12:22 [PATCH net-next 00/12] add support for Renesas RZ/N1 ethernet subsystem devices Clément Léger
2022-04-14 12:22 ` [PATCH net-next 01/12] net: dsa: add support for Renesas RZ/N1 A5PSW switch tag code Clément Léger
2022-04-14 13:44   ` Vladimir Oltean
2022-04-14 12:22 ` [PATCH net-next 02/12] net: dsa: add Renesas RZ/N1 switch tag driver Clément Léger
2022-04-14 14:22   ` Vladimir Oltean
2022-04-14 14:35     ` Clément Léger
2022-04-14 15:11       ` Vladimir Oltean
2022-04-14 16:18         ` Clément Léger
2022-04-14 16:23           ` Russell King (Oracle)
2022-04-15  7:23             ` Clément Léger
2022-04-14 22:50   ` Andrew Lunn
2022-04-14 12:22 ` [PATCH net-next 03/12] dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter Clément Léger
2022-04-14 18:59   ` Rob Herring
2022-04-19 13:43   ` Rob Herring
2022-04-19 15:00     ` Clément Léger
2022-04-20 20:11       ` Rob Herring
2022-04-21  7:35         ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 04/12] net: pcs: add Renesas MII converter driver Clément Léger
2022-04-14 12:49   ` Russell King (Oracle)
2022-04-14 15:14     ` Clément Léger
2022-04-20 13:25   ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 05/12] dt-bindings: net: dsa: add bindings for Renesas RZ/N1 Advanced 5 port switch Clément Léger
2022-04-14 18:59   ` Rob Herring
2022-04-27 12:20   ` Geert Uytterhoeven
2022-04-27 12:56     ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 06/12] net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver Clément Léger
2022-04-14 13:02   ` Russell King (Oracle)
2022-04-15  8:40     ` Clément Léger
2022-04-15  8:52       ` Russell King (Oracle)
2022-04-14 14:47   ` Vladimir Oltean
2022-04-14 17:51     ` Andrew Lunn
2022-04-15  9:34     ` Clément Léger
2022-04-15 10:55       ` Vladimir Oltean
2022-04-15 11:02         ` Russell King (Oracle)
2022-04-15 11:14           ` Vladimir Oltean
2022-04-15 11:23             ` Russell King (Oracle)
2022-04-15 12:01               ` Vladimir Oltean
2022-04-15 11:05         ` Vladimir Oltean
2022-04-15 12:31           ` Clément Léger
2022-04-15 12:28         ` Clément Léger
2022-04-15 12:41           ` Vladimir Oltean
2022-04-14 17:55   ` Andrew Lunn
2022-04-15 12:33     ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 07/12] net: dsa: rzn1-a5psw: add statistics support Clément Léger
2022-04-14 17:34   ` Vladimir Oltean
2022-04-15 12:42     ` Clément Léger
2022-04-14 23:16   ` Andrew Lunn
2022-04-15 12:04     ` Clément Léger
2022-04-15 13:37       ` Andrew Lunn
2022-04-15 13:44         ` Clément Léger
2022-04-14 12:22 ` Clément Léger [this message]
2022-04-14 17:51   ` [PATCH net-next 08/12] net: dsa: rzn1-a5psw: add FDB support Vladimir Oltean
2022-04-20  8:16     ` Clément Léger
2022-04-20 19:52       ` Vladimir Oltean
2022-04-21  7:38         ` Clément Léger
2022-04-14 12:22 ` [PATCH net-next 09/12] ARM: dts: r9a06g032: describe MII converter Clément Léger
2022-04-14 23:22   ` Andrew Lunn
2022-04-15  8:24     ` Clément Léger
2022-04-15 14:16       ` Andrew Lunn
2022-04-15 14:38         ` Clément Léger
2022-04-15 15:12           ` Andrew Lunn
2022-04-15 15:29             ` Clément Léger
2022-04-15 16:19               ` Andrew Lunn
2022-04-15 16:45                 ` Clément Léger
2022-04-16 13:48                   ` Andrew Lunn
2022-04-19  9:03                     ` Clément Léger
2022-04-19 12:57                       ` Andrew Lunn
2022-04-20 20:16                 ` Rob Herring
2022-04-14 12:22 ` [PATCH net-next 10/12] ARM: dts: r9a06g032: describe GMAC2 Clément Léger
2022-04-21  9:31   ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 11/12] ARM: dts: r9a06g032: describe switch Clément Léger
2022-04-21  9:34   ` Geert Uytterhoeven
2022-04-14 12:22 ` [PATCH net-next 12/12] MAINTAINERS: add Renesas RZ/N1 switch related driver entry Clément Léger

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