Re: [PATCH net-next 02/12] net: dsa: add Renesas RZ/N1 switch tag driver

Clément Léger
2022-04-14T14:44:01Z

Le Thu, 14 Apr 2022 17:22:42 +0300,
Vladimir Oltean <olteanv@gmail.com> a écrit :

> > +
> > +/* To define the outgoing port and to discover the incoming port a TAG is
> > + * inserted after Src MAC :
> > + *
> > + * Dest MAC Src MAC TAG Type
> > + * ...| 1 2 3 4 5 6 | 1 2 3 4 5 6 | 1 2 3 4 5 6 7 8 | 1 2 |...
> > + * |<--------------->|
> > + *
> > + * See struct a5psw_tag for layout
> > + */
> > +
> > +#define A5PSW_TAG_VALUE 0xE001
> > +#define A5PSW_TAG_LEN 8
> > +#define A5PSW_CTRL_DATA_FORCE_FORWARD BIT(0)
> > +/* This is both used for xmit tag and rcv tagging */
> > +#define A5PSW_CTRL_DATA_PORT GENMASK(3, 0)
> > +
> > +struct a5psw_tag {
>
> This needs to be packed.
>
> > + u16 ctrl_tag;
> > + u16 ctrl_data;
>
> These need to be __be16.
>
> > + u32 ctrl_data2;
>
> This needs to be __be32.

Acked.

>
> > +};
> > +
> > +static struct sk_buff *a5psw_tag_xmit(struct sk_buff *skb, struct net_device *dev)
> > +{
> > + struct a5psw_tag *ptag, tag = {0};
> > + struct dsa_port *dp = dsa_slave_to_port(dev);
>
> Please keep variable declarations sorted in decreasing order of line
> length (applies throughout the patch series, I won't repeat this comment).

Acked, both PCS and DSA driver are ok with that rule. Missed that one
though.
>
> > + u32 data2_val;
> > +
> > + /* The Ethernet switch we are interfaced with needs packets to be at
> > + * least 64 bytes (including FCS) otherwise they will be discarded when
> > + * they enter the switch port logic. When tagging is enabled, we need
> > + * to make sure that packets are at least 68 bytes (including FCS and
> > + * tag).
> > + */
> > + if (__skb_put_padto(skb, ETH_ZLEN + sizeof(tag), false))
> > + return NULL;
> > +
> > + /* provide 'A5PSW_TAG_LEN' bytes additional space */
> > + skb_push(skb, A5PSW_TAG_LEN);
> > +
> > + /* make room between MACs and Ether-Type to insert tag */
> > + dsa_alloc_etype_header(skb, A5PSW_TAG_LEN);
> > +
> > + ptag = dsa_etype_header_pos_tx(skb);
> > +
> > + data2_val = FIELD_PREP(A5PSW_CTRL_DATA_PORT, BIT(dp->index));
> > + tag.ctrl_tag = htons(A5PSW_TAG_VALUE);
> > + tag.ctrl_data = htons(A5PSW_CTRL_DATA_FORCE_FORWARD);
> > + tag.ctrl_data2 = htonl(data2_val);
> > +
> > + memcpy(ptag, &tag, sizeof(struct a5psw_tag));
>
> sizeof(tag), to be consistent with the other use of sizeof() above?
> Although, hmm, I think you could get away with editing "ptag" in place.

I was not sure of the alignment guarantee I would have here. If the
VLAN header is guaranteed to be aligned on 2 bytes, then I guess it's
ok to do that in-place.

--
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin