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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
	<angelogioacchino.delregno@collabora.com>,
	<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
	<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH V3 07/17] clk: mediatek: reset: Add return for clock reset register function
Date: Fri, 22 Apr 2022 14:01:42 +0800	[thread overview]
Message-ID: <20220422060152.13534-8-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220422060152.13534-1-rex-bc.chen@mediatek.com>

To make error handling, we add return for mtk_clk_register_rst_ctrl().

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 drivers/clk/mediatek/reset.c | 15 +++++++++------
 drivers/clk/mediatek/reset.h |  4 ++--
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index 587cf8e626de..03d865f3308e 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -97,8 +97,8 @@ static const struct reset_control_ops mtk_reset_ops_set_clr = {
 	.reset = mtk_reset_set_clr,
 };
 
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc)
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc)
 {
 	struct regmap *regmap;
 	const struct reset_control_ops *rcops = NULL;
@@ -107,7 +107,7 @@ void mtk_register_reset_controller(struct device_node *np,
 
 	if (!desc) {
 		pr_err("mtk clock reset desc is NULL\n");
-		return;
+		return -EINVAL;
 	}
 
 	switch (desc->version) {
@@ -119,18 +119,18 @@ void mtk_register_reset_controller(struct device_node *np,
 		break;
 	default:
 		pr_err("Unknown reset version %d\n", desc->version);
-		return;
+		return -EINVAL;
 	}
 
 	regmap = device_node_to_regmap(np);
 	if (IS_ERR(regmap)) {
 		pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap);
-		return;
+		return -EINVAL;
 	}
 
 	data = kzalloc(sizeof(*data), GFP_KERNEL);
 	if (!data)
-		return;
+		return -ENOMEM;
 
 	data->desc = desc;
 	data->regmap = regmap;
@@ -143,7 +143,10 @@ void mtk_register_reset_controller(struct device_node *np,
 	if (ret) {
 		pr_err("could not register reset controller: %d\n", ret);
 		kfree(data);
+		return ret;
 	}
+
+	return 0;
 }
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index db558ea4a474..c3a2f2a4f486 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -27,7 +27,7 @@ struct mtk_clk_rst_data {
 	const struct mtk_clk_rst_desc *desc;
 };
 
-void mtk_register_reset_controller(struct device_node *np,
-				   const struct mtk_clk_rst_desc *desc);
+int mtk_register_reset_controller(struct device_node *np,
+				  const struct mtk_clk_rst_desc *desc);
 
 #endif /* __DRV_CLK_MTK_RESET_H */
-- 
2.18.0


  parent reply	other threads:[~2022-04-22  6:02 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-22  6:01 [PATCH V3 00/17] Cleanup MediaTek clk reset drivers and support MT8192/MT8195 Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 01/17] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-04-26  9:33   ` AngeloGioacchino Del Regno
2022-04-22  6:01 ` [PATCH V3 02/17] clk: mediatek: reset: Fix written reset bit offset Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 03/17] clk: mediatek: reset: Refine and reorder functions in reset.c Rex-BC Chen
2022-04-26  9:34   ` AngeloGioacchino Del Regno
2022-04-22  6:01 ` [PATCH V3 04/17] clk: mediatek: reset: Extract common drivers to update function Rex-BC Chen
2022-04-26  9:34   ` AngeloGioacchino Del Regno
2022-04-22  6:01 ` [PATCH V3 05/17] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-04-26  9:34   ` AngeloGioacchino Del Regno
2022-04-22  6:01 ` [PATCH V3 06/17] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-04-26  9:34   ` AngeloGioacchino Del Regno
2022-04-22  6:01 ` Rex-BC Chen [this message]
2022-04-26  9:34   ` [PATCH V3 07/17] clk: mediatek: reset: Add return for clock reset register function AngeloGioacchino Del Regno
2022-04-22  6:01 ` [PATCH V3 08/17] clk: mediatek: reset: Add new register reset function with device Rex-BC Chen
2022-04-26  9:34   ` AngeloGioacchino Del Regno
2022-04-22  6:01 ` [PATCH V3 09/17] clk: mediatek: reset: Add support for input offset and bit from DT Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 10/17] clk: mediatek: reset: Add reset support for simple probe Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 11/17] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192-sys-clock Rex-BC Chen
2022-04-23 10:27   ` Krzysztof Kozlowski
2022-04-25  2:37     ` Rex-BC Chen
2022-04-25  7:44       ` Krzysztof Kozlowski
2022-04-26  8:24         ` Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 12/17] dt-binding: mt8192: Add infra_ao reset bit Rex-BC Chen
2022-04-23 10:28   ` Krzysztof Kozlowski
2022-04-25  5:01     ` Rex-BC Chen
2022-04-25  7:52       ` Krzysztof Kozlowski
2022-04-26  8:23         ` Rex-BC Chen
2022-04-28  6:40           ` Krzysztof Kozlowski
2022-04-28  6:48             ` Rex-BC Chen
2022-04-28  7:23               ` Krzysztof Kozlowski
2022-04-28  7:36                 ` Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 13/17] dt-bindings: arm: mediatek: Add #reset-cells property for MT8195-sys-clock Rex-BC Chen
2022-04-23 10:28   ` Krzysztof Kozlowski
2022-04-22  6:01 ` [PATCH V3 14/17] dt-binding: mt8195: Add infra_ao reset bit Rex-BC Chen
2022-04-23 10:29   ` Krzysztof Kozlowski
2022-04-22  6:01 ` [PATCH V3 15/17] clk: mediatek: reset: Add infra_ao reset support for MT8192 Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 16/17] clk: mediatek: reset: Add infra_ao reset support for MT8195 Rex-BC Chen
2022-04-22  6:01 ` [PATCH V3 17/17] arm64: dts: mediatek: Add infra #reset-cells property for MT8192 Rex-BC Chen

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