From: Alexandre Torgue <alexandre.torgue@foss.st.com>
To: <arnd@arndb.de>, <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>, <soc@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-kernel@vger.kernel.org>, Marek Vasut <marex@denx.de>,
Ahmad Fatoum <a.fatoum@pengutronix.de>, <etienne.carriere@st.com>
Subject: [PATCH 3/8] dt-bindings: clock: stm32mp15: rename CK_SCMI define
Date: Fri, 22 Apr 2022 17:09:47 +0200 [thread overview]
Message-ID: <20220422150952.20587-4-alexandre.torgue@foss.st.com> (raw)
In-Reply-To: <20220422150952.20587-1-alexandre.torgue@foss.st.com>
As we only have one SCMI instance, it's not necessary to add an index to
the name.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
diff --git a/include/dt-bindings/clock/stm32mp1-clks.h b/include/dt-bindings/clock/stm32mp1-clks.h
index e02770b98e6c..25e8cfd43459 100644
--- a/include/dt-bindings/clock/stm32mp1-clks.h
+++ b/include/dt-bindings/clock/stm32mp1-clks.h
@@ -249,30 +249,26 @@
#define STM32MP1_LAST_CLK 232
/* SCMI clock identifiers */
-#define CK_SCMI0_HSE 0
-#define CK_SCMI0_HSI 1
-#define CK_SCMI0_CSI 2
-#define CK_SCMI0_LSE 3
-#define CK_SCMI0_LSI 4
-#define CK_SCMI0_PLL2_Q 5
-#define CK_SCMI0_PLL2_R 6
-#define CK_SCMI0_MPU 7
-#define CK_SCMI0_AXI 8
-#define CK_SCMI0_BSEC 9
-#define CK_SCMI0_CRYP1 10
-#define CK_SCMI0_GPIOZ 11
-#define CK_SCMI0_HASH1 12
-#define CK_SCMI0_I2C4 13
-#define CK_SCMI0_I2C6 14
-#define CK_SCMI0_IWDG1 15
-#define CK_SCMI0_RNG1 16
-#define CK_SCMI0_RTC 17
-#define CK_SCMI0_RTCAPB 18
-#define CK_SCMI0_SPI6 19
-#define CK_SCMI0_USART1 20
-
-#define CK_SCMI1_PLL3_Q 0
-#define CK_SCMI1_PLL3_R 1
-#define CK_SCMI1_MCU 2
+#define CK_SCMI_HSE 0
+#define CK_SCMI_HSI 1
+#define CK_SCMI_CSI 2
+#define CK_SCMI_LSE 3
+#define CK_SCMI_LSI 4
+#define CK_SCMI_PLL2_Q 5
+#define CK_SCMI_PLL2_R 6
+#define CK_SCMI_MPU 7
+#define CK_SCMI_AXI 8
+#define CK_SCMI_BSEC 9
+#define CK_SCMI_CRYP1 10
+#define CK_SCMI_GPIOZ 11
+#define CK_SCMI_HASH1 12
+#define CK_SCMI_I2C4 13
+#define CK_SCMI_I2C6 14
+#define CK_SCMI_IWDG1 15
+#define CK_SCMI_RNG1 16
+#define CK_SCMI_RTC 17
+#define CK_SCMI_RTCAPB 18
+#define CK_SCMI_SPI6 19
+#define CK_SCMI_USART1 20
#endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */
--
2.17.1
next prev parent reply other threads:[~2022-04-22 15:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 15:09 [PATCH 0/8] Add SCMI version of ST boards Alexandre Torgue
2022-04-22 15:09 ` [PATCH 1/8] dt-bindings: rcc: Add optional external ethernet RX clock properties Alexandre Torgue
2022-04-22 16:28 ` Marek Vasut
2022-04-25 17:21 ` Alexandre TORGUE
2022-04-22 15:09 ` [PATCH 2/8] dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure" Alexandre Torgue
2022-04-22 16:31 ` Marek Vasut
2022-04-25 19:11 ` Rob Herring
2022-04-25 19:35 ` Marek Vasut
2022-04-26 18:44 ` Rob Herring
2022-05-02 21:13 ` Rob Herring
[not found] ` <CAL_JsqKU28BNrozg20_a_XMUmBhaoDHdodWkzyRoH=VcM2pDjg@mail.gmail.com>
2022-05-06 10:02 ` Alexandre TORGUE
[not found] ` <CAL_JsqK5ox681qQFz6b4a8eSaNHJ08XmB2bTE=EZ2Pch0YDJqA@mail.gmail.com>
[not found] ` <CAL_JsqKfA1joqDiophO4qk0S1XfgxE2EWUBrxqXrGdfjOAe=ew@mail.gmail.com>
2022-05-09 12:55 ` Alexandre TORGUE
2022-04-22 15:09 ` Alexandre Torgue [this message]
2022-05-02 21:26 ` [PATCH 3/8] dt-bindings: clock: stm32mp15: rename CK_SCMI define Rob Herring
2022-04-22 15:09 ` [PATCH 4/8] dt-bindings: reset: stm32mp15: rename RST_SCMI define Alexandre Torgue
2022-05-02 21:27 ` Rob Herring
2022-04-22 15:09 ` [PATCH 5/8] ARM: stm32: select OPTEE on MPU family Alexandre Torgue
2022-04-22 15:37 ` Ahmad Fatoum
2022-04-22 16:23 ` Alexandre TORGUE
2022-04-22 15:09 ` [PATCH 6/8] ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 Alexandre Torgue
2022-04-22 16:32 ` Marek Vasut
2022-04-25 10:19 ` Etienne CARRIERE
2022-04-25 10:25 ` Marek Vasut
2022-04-25 10:30 ` Rouven Czerwinski
2022-04-22 15:09 ` [PATCH 7/8] dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) Alexandre Torgue
2022-05-02 21:28 ` Rob Herring
2022-04-22 15:09 ` [PATCH 8/8] ARM: dts: " Alexandre Torgue
2022-05-03 14:51 ` [PATCH 0/8] Add SCMI version of ST boards Alexandre TORGUE
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220422150952.20587-4-alexandre.torgue@foss.st.com \
--to=alexandre.torgue@foss.st.com \
--cc=a.fatoum@pengutronix.de \
--cc=arnd@arndb.de \
--cc=devicetree@vger.kernel.org \
--cc=etienne.carriere@st.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=marex@denx.de \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=soc@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).