[PATCH 1/2] dt-bindings: net: dsa: marvell: Add single-chip-address property

[PATCH 1/2] dt-bindings: net: dsa: marvell: Add single-chip-address property

[Nathan Rossi]

Some Marvell DSA devices can be accessed in a single chip addressing
mode. This is currently configured by setting the address of the switch
to 0. However switches in this configuration do not respond to address
0, only responding to higher addresses (fixed addressed based on the
switch model) for the individual ports/etc. This is a feature to allow
for other phys to exist on the same mdio bus.

This change defines a 'single-chip-address' property in order to
explicitly define that the chip is accessed in this mode. This allows
for a switch to have an address defined other than 0, so that address
0 can be used for another mdio device.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
---
 Documentation/devicetree/bindings/net/dsa/marvell.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt
index 2363b41241..5c7304274c 100644
--- a/Documentation/devicetree/bindings/net/dsa/marvell.txt
+++ b/Documentation/devicetree/bindings/net/dsa/marvell.txt
@@ -46,6 +46,8 @@ Optional properties:
 - mdio?		: Container of PHYs and devices on the external MDIO
 			  bus. The node must contains a compatible string of
 			  "marvell,mv88e6xxx-mdio-external"
+- single-chip-address	: Device is configured to use single chip addressing
+			  mode.
 
 Example:
 
---
2.35.2

Re: [PATCH 1/2] dt-bindings: net: dsa: marvell: Add single-chip-address property

[Rob Herring]

On Sat, Apr 23, 2022 at 01:14:27PM +0000, Nathan Rossi wrote:
> Some Marvell DSA devices can be accessed in a single chip addressing
> mode. This is currently configured by setting the address of the switch
> to 0. However switches in this configuration do not respond to address
> 0, only responding to higher addresses (fixed addressed based on the
> switch model) for the individual ports/etc. This is a feature to allow
> for other phys to exist on the same mdio bus.
> 
> This change defines a 'single-chip-address' property in order to
> explicitly define that the chip is accessed in this mode. This allows
> for a switch to have an address defined other than 0, so that address
> 0 can be used for another mdio device.
> 
> Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
> ---
>  Documentation/devicetree/bindings/net/dsa/marvell.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt
> index 2363b41241..5c7304274c 100644
> --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/marvell.txt
> @@ -46,6 +46,8 @@ Optional properties:
>  - mdio?		: Container of PHYs and devices on the external MDIO
>  			  bus. The node must contains a compatible string of
>  			  "marvell,mv88e6xxx-mdio-external"
> +- single-chip-address	: Device is configured to use single chip addressing
> +			  mode.

Doesn't sound like a common feature, it needs a vendor prefix.

Some of the commit message explanation of what 'single chip addressing' 
is is needed here.

Rob