From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F086C433EF for ; Sun, 24 Apr 2022 12:28:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230360AbiDXMbW (ORCPT ); Sun, 24 Apr 2022 08:31:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229491AbiDXMbT (ORCPT ); Sun, 24 Apr 2022 08:31:19 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 714FB1586D6; Sun, 24 Apr 2022 05:28:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0F093B80E0F; Sun, 24 Apr 2022 12:28:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 821C2C385A9; Sun, 24 Apr 2022 12:28:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650803295; bh=U07pGZ+oM4pZZ0DXrmNNM3ozgqH/xrTg93BTN5x0lVo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WL/yr6H3gcdvelIo2aqZSTrd21bZ1Tt4bynqV/k5PdsNKgUdVtayclaXFZ+G70PGw 2Rrbid7nQS2GLOk44fSAcRlbrHQNKr9C+vqVzqJa9m4XA9/NBNvc6VlcLRITw/TmMT pO4ddgV9mKs3pXtN9B0NLE80wRY4MI/5uMqHqQP1Vsod05Ou2kfibURYctzKUkk+q/ IU+oJNsQx0gONSqtsHU8tD9lashXOaNI0HXethlyR2Q3LoFeNBn9XEBAQfMqvBj0Tg 7ArEBvL/XWzGyhwstz/3UbxXciufr3sNpfhw3/S2A7o+NpsufyJ6wGnO0y4eD+YjTm pLcVwVayVHgyg== Date: Sun, 24 Apr 2022 20:28:08 +0800 From: Shawn Guo To: Manoj Sai Cc: Rob Herring , Li Yang , Fabio Estevam , Krzysztof Kozlowski , Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki , Catalin Marinas , Will Deacon , Rob Herring , Suniel Mahesh , Michael Nazzareno Trimarchi Subject: Re: [PATCH v2 3/3] Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor CapacitiveEvaluation Board. Message-ID: <20220424122808.GT391514@dragon> References: <20220330191437.614065-2-abbaraju.manojsai@amarulasolutions.com> <20220418144907.327511-1-abbaraju.manojsai@amarulasolutions.com> <20220418144907.327511-3-abbaraju.manojsai@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220418144907.327511-3-abbaraju.manojsai@amarulasolutions.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Apr 18, 2022 at 08:19:07PM +0530, Manoj Sai wrote: > Genaral features: > - LCD 7" C.Touch > - microSD slot > - Ethernet 1Gb > - Wifi/BT > - 2x LVDS Full HD interfaces > - 3x USB 2.0 > - 1x USB 3.0 > - HDMI Out > - Plus PCIe > - MIPI CSI > - 2x CAN > - Audio Out > > i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. > > i.Core MX8M Plus needs to mount on top of this Evaluation board for > creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit. > > Add support for it. > > Signed-off-by: Manoj Sai > Signed-off-by: Matteo Lisi > Reviewed-by: Jagan Teki Please have a short patch subject and prefix it like 'arm64: dts: ...' > --- > Changes for v2: > -corrected the naming convetion of nodes as per existing > sources and bindings. > -added the iomux to the end as per nxp convention. > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../freescale/imx8mp-icore-mx8mp-edimm2.2.dts | 176 ++++++++++++++++++ > 2 files changed, 177 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 85c2c9ba5110..1c06393b8ba9 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dahlia.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb Keep the list sort alphabetically. > dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mq-kontron-pitx-imx8m.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts > new file mode 100644 > index 000000000000..d623ea9dea2b > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts > @@ -0,0 +1,176 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2018 NXP > + * Copyright (c) 2019 Engicam srl > + * Copyright (c) 2020 Amarula Solutons(India) > + */ > + > +/dts-v1/; > + > +#include "imx8mp.dtsi" > +#include "imx8mp-icore-mx8mp.dtsi" > +#include > + > +/ { > + model = "Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit"; > + compatible = "engicam,icore-mx8mp-edimm2.2", "engicam,icore-mx8mp", > + "fsl,imx8mp"; > + > + chosen { > + stdout-path = &uart2; > + }; > + > + reg_usb1_vbus: regulator-usb1 { > + compatible = "regulator-fixed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_reg_usb1>; > + regulator-name = "usb1_host_vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; Why always-on? Shouldn't be controlled by client device (usb1)? > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + reg_usdhc2_vmmc: regulator-usdhc2 { > + compatible = "regulator-fixed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; > + regulator-name = "VSD_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > +}; > + > +/* Ethernet */ > +&eqos { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_eqos>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy0>; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy0: ethernet-phy@7 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + micrel,led-mode = <0>; > + reg = <7>; > + }; > + }; > +}; > + > +/* console */ > +&uart2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart2>; > + status = "okay"; > +}; > + > +&usb3_phy0 { > + status = "okay"; > +}; > + > +&usb3_0 { Keep labeling nodes sort alphabetically. > + status = "okay"; > +}; > + > +&usb_dwc3_0 { > + dr_mode = "host"; > + status = "okay"; > +}; > + > +&usb3_phy1 { > + status = "okay"; > +}; > + > +&usb3_1 { > + status = "okay"; > +}; > + > +&usb_dwc3_1 { > + dr_mode = "host"; > + status = "okay"; > +}; > + > +/* SDCARD */ > +&usdhc2 { > + pinctrl-names = "default" ; > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; > + vmmc-supply = <®_usdhc2_vmmc>; > + bus-width = <4>; > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl_eqos: eqosgrp { > + fsl,pins = < > + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 > + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 > + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 > + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 > + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91 > + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91 > + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 > + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 > + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f > + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f > + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f > + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f > + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f > + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f > + MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x19 > + >; > + }; > + > + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 > + >; > + }; > + > + pinctrl_uart2: uart2grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49 > + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49 > + >; > + }; > + > + pinctrl_uart3: uart3grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 > + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 > + MX8MP_IOMUXC_SD1_STROBE__UART3_DCE_CTS 0x140 > + >; > + }; > + > + pinctrl_reg_usb1: regusb1grp { Keep pinctrl nodes sort alphabetically. Shawn > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x19 > + >; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 > + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 > + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 > + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 > + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 > + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 > + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 > + >; > + }; > +}; > -- > 2.25.1 >