devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
	<angelogioacchino.delregno@collabora.com>,
	<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
	<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH V4 11/15] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195
Date: Wed, 27 Apr 2022 11:09:46 +0800	[thread overview]
Message-ID: <20220427030950.23395-12-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220427030950.23395-1-rex-bc.chen@mediatek.com>

We will use the infra_ao reset which is defined in mt8192-sys-clock
and mt8195-sys-clock.
The value of reset-cells is always equal to 1.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml       | 3 +++
 .../bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml       | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml
index 5705bcf1fe47..27f79175c678 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml
@@ -29,6 +29,9 @@ properties:
   '#clock-cells':
     const: 1
 
+  '#reset-cells':
+    const: 1
+
 required:
   - compatible
   - reg
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml
index 57a1503d95fe..95b6bdf99936 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml
@@ -37,6 +37,9 @@ properties:
   '#clock-cells':
     const: 1
 
+  '#reset-cells':
+    const: 1
+
 required:
   - compatible
   - reg
-- 
2.18.0


  parent reply	other threads:[~2022-04-27  3:12 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-27  3:09 [PATCH V4 00/15] Cleanup MediaTek clk reset drivers and support MT8192/MT8195 Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 01/15] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 02/15] clk: mediatek: reset: Fix written reset bit offset Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 03/15] clk: mediatek: reset: Refine and reorder functions in reset.c Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 04/15] clk: mediatek: reset: Extract common drivers to update function Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 05/15] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 06/15] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 07/15] clk: mediatek: reset: Support nonsequence base offsets of reset registers Rex-BC Chen
2022-04-27 13:38   ` AngeloGioacchino Del Regno
2022-04-28  5:08     ` Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 08/15] clk: mediatek: reset: Change return type for clock reset register function Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 09/15] clk: mediatek: reset: Add new register reset function with device Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 10/15] clk: mediatek: reset: Add reset support for simple probe Rex-BC Chen
2022-04-27  3:09 ` Rex-BC Chen [this message]
2022-04-28  7:17   ` [PATCH V4 11/15] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195 Krzysztof Kozlowski
2022-04-27  3:09 ` [PATCH V4 12/15] dt-bindings: reset: mediatek: Add infra_ao reset bit " Rex-BC Chen
2022-04-28  7:18   ` Krzysztof Kozlowski
2022-04-28 11:18     ` Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 13/15] clk: mediatek: reset: Add infra_ao reset support " Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 14/15] arm64: dts: mediatek: Add infra #reset-cells property for MT8192 Rex-BC Chen
2022-04-27  3:09 ` [PATCH V4 15/15] arm64: dts: mediatek: Add infra #reset-cells property for MT8195 Rex-BC Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220427030950.23395-12-rex-bc.chen@mediatek.com \
    --to=rex-bc.chen@mediatek.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=angelogioacchino.delregno@collabora.com \
    --cc=chun-jie.chen@mediatek.com \
    --cc=devicetree@vger.kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=mturquette@baylibre.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    --cc=runyang.chen@mediatek.com \
    --cc=sboyd@kernel.org \
    --cc=wenst@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).