From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>
Cc: <p.zabel@pengutronix.de>,
<angelogioacchino.delregno@collabora.com>,
<chun-jie.chen@mediatek.com>, <wenst@chromium.org>,
<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH V4 14/15] arm64: dts: mediatek: Add infra #reset-cells property for MT8192
Date: Wed, 27 Apr 2022 11:09:49 +0800 [thread overview]
Message-ID: <20220427030950.23395-15-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220427030950.23395-1-rex-bc.chen@mediatek.com>
To support reset of infra, we add the property of #reset-cells.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 411feb294613..79803420d8ef 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -269,6 +269,7 @@
compatible = "mediatek,mt8192-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
pericfg: syscon@10003000 {
--
2.18.0
next prev parent reply other threads:[~2022-04-27 3:12 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-27 3:09 [PATCH V4 00/15] Cleanup MediaTek clk reset drivers and support MT8192/MT8195 Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 01/15] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 02/15] clk: mediatek: reset: Fix written reset bit offset Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 03/15] clk: mediatek: reset: Refine and reorder functions in reset.c Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 04/15] clk: mediatek: reset: Extract common drivers to update function Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 05/15] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 06/15] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 07/15] clk: mediatek: reset: Support nonsequence base offsets of reset registers Rex-BC Chen
2022-04-27 13:38 ` AngeloGioacchino Del Regno
2022-04-28 5:08 ` Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 08/15] clk: mediatek: reset: Change return type for clock reset register function Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 09/15] clk: mediatek: reset: Add new register reset function with device Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 10/15] clk: mediatek: reset: Add reset support for simple probe Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 11/15] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195 Rex-BC Chen
2022-04-28 7:17 ` Krzysztof Kozlowski
2022-04-27 3:09 ` [PATCH V4 12/15] dt-bindings: reset: mediatek: Add infra_ao reset bit " Rex-BC Chen
2022-04-28 7:18 ` Krzysztof Kozlowski
2022-04-28 11:18 ` Rex-BC Chen
2022-04-27 3:09 ` [PATCH V4 13/15] clk: mediatek: reset: Add infra_ao reset support " Rex-BC Chen
2022-04-27 3:09 ` Rex-BC Chen [this message]
2022-04-27 3:09 ` [PATCH V4 15/15] arm64: dts: mediatek: Add infra #reset-cells property for MT8195 Rex-BC Chen
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