* [PATCH 1/3] MIPS: mscc: jaguar2: rename pinctrl nodes
@ 2022-04-20 19:50 Michael Walle
2022-04-20 19:50 ` [PATCH 2/3] MIPS: mscc: ocelot: " Michael Walle
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Michael Walle @ 2022-04-20 19:50 UTC (permalink / raw)
To: Alexandre Belloni, Thomas Bogendoerfer
Cc: UNGLinuxDriver, Rob Herring, Krzysztof Kozlowski, linux-mips,
devicetree, linux-kernel, Michael Walle
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
---
The YAML conversion patch is alread in
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel
arch/mips/boot/dts/mscc/jaguar2_pcb110.dts | 10 +++++-----
arch/mips/boot/dts/mscc/jaguar2_pcb111.dts | 10 +++++-----
arch/mips/boot/dts/mscc/jaguar2_pcb118.dts | 6 +++---
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/mips/boot/dts/mscc/jaguar2_pcb110.dts b/arch/mips/boot/dts/mscc/jaguar2_pcb110.dts
index d80cd6842b2a..0ea7bc5b5746 100644
--- a/arch/mips/boot/dts/mscc/jaguar2_pcb110.dts
+++ b/arch/mips/boot/dts/mscc/jaguar2_pcb110.dts
@@ -180,27 +180,27 @@ synce_builtin_pins: synce-builtin-pins {
pins = "GPIO_49";
function = "si";
};
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_17", "GPIO_18", "GPIO_20", "GPIO_21";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_21";
function = "twi_scl_m";
output-high;
diff --git a/arch/mips/boot/dts/mscc/jaguar2_pcb111.dts b/arch/mips/boot/dts/mscc/jaguar2_pcb111.dts
index 813c5e16013c..05d8c6a96dc4 100644
--- a/arch/mips/boot/dts/mscc/jaguar2_pcb111.dts
+++ b/arch/mips/boot/dts/mscc/jaguar2_pcb111.dts
@@ -79,27 +79,27 @@ cpld_fifo_pins: synce-builtin-pins {
};
&gpio {
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_17", "GPIO_18";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_21";
function = "twi_scl_m";
output-high;
diff --git a/arch/mips/boot/dts/mscc/jaguar2_pcb118.dts b/arch/mips/boot/dts/mscc/jaguar2_pcb118.dts
index 27c644f2d17f..cf2cf591a211 100644
--- a/arch/mips/boot/dts/mscc/jaguar2_pcb118.dts
+++ b/arch/mips/boot/dts/mscc/jaguar2_pcb118.dts
@@ -39,17 +39,17 @@ i2c151: i2c@1 {
};
&gpio {
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_17", "GPIO_16";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_16";
function = "twi_scl_m";
output-high;
--
2.30.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/3] MIPS: mscc: ocelot: rename pinctrl nodes
2022-04-20 19:50 [PATCH 1/3] MIPS: mscc: jaguar2: rename pinctrl nodes Michael Walle
@ 2022-04-20 19:50 ` Michael Walle
2022-04-20 19:50 ` [PATCH 3/3] MIPS: mscc: serval: " Michael Walle
2022-04-27 9:00 ` [PATCH 1/3] MIPS: mscc: jaguar2: " Thomas Bogendoerfer
2 siblings, 0 replies; 4+ messages in thread
From: Michael Walle @ 2022-04-20 19:50 UTC (permalink / raw)
To: Alexandre Belloni, Thomas Bogendoerfer
Cc: UNGLinuxDriver, Rob Herring, Krzysztof Kozlowski, linux-mips,
devicetree, linux-kernel, Michael Walle
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
---
The YAML conversion patch is alread in
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel
arch/mips/boot/dts/mscc/ocelot.dtsi | 4 ++--
arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index e51db651af13..cfc219a72bdd 100644
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -225,7 +225,7 @@ uart2_pins: uart2-pins {
function = "uart2";
};
- miim1: miim1 {
+ miim1_pins: miim1-pins {
pins = "GPIO_14", "GPIO_15";
function = "miim";
};
@@ -261,7 +261,7 @@ mdio1: mdio@10700c0 {
reg = <0x10700c0 0x24>;
interrupts = <15>;
pinctrl-names = "default";
- pinctrl-0 = <&miim1>;
+ pinctrl-0 = <&miim1_pins>;
status = "disabled";
};
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
index bd240690cb37..d348742c233d 100644
--- a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
+++ b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
@@ -22,12 +22,12 @@ memory@0 {
};
&gpio {
- phy_int_pins: phy_int_pins {
+ phy_int_pins: phy-int-pins {
pins = "GPIO_4";
function = "gpio";
};
- phy_load_save_pins: phy_load_save_pins {
+ phy_load_save_pins: phy-load-save-pins {
pins = "GPIO_10";
function = "ptp2";
};
@@ -40,7 +40,7 @@ &mdio0 {
&mdio1 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
+ pinctrl-0 = <&miim1_pins>, <&phy_int_pins>, <&phy_load_save_pins>;
phy7: ethernet-phy@0 {
reg = <0>;
--
2.30.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] MIPS: mscc: serval: rename pinctrl nodes
2022-04-20 19:50 [PATCH 1/3] MIPS: mscc: jaguar2: rename pinctrl nodes Michael Walle
2022-04-20 19:50 ` [PATCH 2/3] MIPS: mscc: ocelot: " Michael Walle
@ 2022-04-20 19:50 ` Michael Walle
2022-04-27 9:00 ` [PATCH 1/3] MIPS: mscc: jaguar2: " Thomas Bogendoerfer
2 siblings, 0 replies; 4+ messages in thread
From: Michael Walle @ 2022-04-20 19:50 UTC (permalink / raw)
To: Alexandre Belloni, Thomas Bogendoerfer
Cc: UNGLinuxDriver, Rob Herring, Krzysztof Kozlowski, linux-mips,
devicetree, linux-kernel, Michael Walle
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
---
The YAML conversion patch is alread in
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel
arch/mips/boot/dts/mscc/serval_common.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/mips/boot/dts/mscc/serval_common.dtsi b/arch/mips/boot/dts/mscc/serval_common.dtsi
index 5b404836db5e..0893de420e27 100644
--- a/arch/mips/boot/dts/mscc/serval_common.dtsi
+++ b/arch/mips/boot/dts/mscc/serval_common.dtsi
@@ -82,38 +82,38 @@ i2c_pins: i2c-pins {
pins = "GPIO_7"; /* No "default" scl for i2c0 */
function = "twi";
};
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_11", "GPIO_12", "GPIO_18", "GPIO_19",
"GPIO_20", "GPIO_21";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_11";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_12";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_19";
function = "twi_scl_m";
output-high;
};
- i2cmux_4: i2cmux-4 {
+ i2cmux_4: i2cmux-4-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_5: i2cmux-5 {
+ i2cmux_5: i2cmux-5-pins {
pins = "GPIO_21";
function = "twi_scl_m";
output-high;
--
2.30.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 1/3] MIPS: mscc: jaguar2: rename pinctrl nodes
2022-04-20 19:50 [PATCH 1/3] MIPS: mscc: jaguar2: rename pinctrl nodes Michael Walle
2022-04-20 19:50 ` [PATCH 2/3] MIPS: mscc: ocelot: " Michael Walle
2022-04-20 19:50 ` [PATCH 3/3] MIPS: mscc: serval: " Michael Walle
@ 2022-04-27 9:00 ` Thomas Bogendoerfer
2 siblings, 0 replies; 4+ messages in thread
From: Thomas Bogendoerfer @ 2022-04-27 9:00 UTC (permalink / raw)
To: Michael Walle
Cc: Alexandre Belloni, UNGLinuxDriver, Rob Herring,
Krzysztof Kozlowski, linux-mips, devicetree, linux-kernel
On Wed, Apr 20, 2022 at 09:50:16PM +0200, Michael Walle wrote:
> The pinctrl device tree binding will be converted to YAML format. Rename
> the pin nodes so they end with "-pins" to match the schema.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> The YAML conversion patch is alread in
> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel
>
> arch/mips/boot/dts/mscc/jaguar2_pcb110.dts | 10 +++++-----
> arch/mips/boot/dts/mscc/jaguar2_pcb111.dts | 10 +++++-----
> arch/mips/boot/dts/mscc/jaguar2_pcb118.dts | 6 +++---
> 3 files changed, 13 insertions(+), 13 deletions(-)
series applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-04-27 9:10 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-04-20 19:50 [PATCH 1/3] MIPS: mscc: jaguar2: rename pinctrl nodes Michael Walle
2022-04-20 19:50 ` [PATCH 2/3] MIPS: mscc: ocelot: " Michael Walle
2022-04-20 19:50 ` [PATCH 3/3] MIPS: mscc: serval: " Michael Walle
2022-04-27 9:00 ` [PATCH 1/3] MIPS: mscc: jaguar2: " Thomas Bogendoerfer
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).