From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v3 4/5] dt-bindings: pci/qcom,pcie: support additional MSI interrupts
Date: Wed, 27 Apr 2022 15:16:52 +0300 [thread overview]
Message-ID: <20220427121653.3158569-5-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220427121653.3158569-1-dmitry.baryshkov@linaro.org>
On Qualcomm platforms each group of 32 MSI vectors is routed to the
separate GIC interrupt. Document mapping of additional interrupts.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 48d56b073564..8447076bef97 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -42,11 +42,21 @@ properties:
maxItems: 5
interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 8
interrupt-names:
+ minItems: 1
+ maxItems: 8
items:
- const: msi
+ - const: msi2
+ - const: msi3
+ - const: msi4
+ - const: msi5
+ - const: msi6
+ - const: msi7
+ - const: msi8
# Common definitions for clocks, clock-names and reset.
# Platform constraints are described later.
--
2.35.1
next prev parent reply other threads:[~2022-04-27 12:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-27 12:16 [PATCH v3 0/5] PCI: qcom: Fix higher MSI vectors handling Dmitry Baryshkov
2022-04-27 12:16 ` [PATCH v3 1/5] PCI: dwc: Convert msi_irq to the array Dmitry Baryshkov
2022-04-27 14:13 ` Manivannan Sadhasivam
2022-04-27 16:59 ` Dmitry Baryshkov
2022-04-28 6:06 ` Manivannan Sadhasivam
2022-04-28 7:43 ` Dmitry Baryshkov
2022-04-28 7:47 ` Manivannan Sadhasivam
2022-04-27 12:16 ` [PATCH v3 2/5] PCI: dwc: Teach dwc core to parse additional MSI interrupts Dmitry Baryshkov
2022-04-27 12:16 ` [PATCH v3 3/5] PCI: qcom: Handle MSI IRQs properly Dmitry Baryshkov
2022-04-27 12:16 ` Dmitry Baryshkov [this message]
2022-04-28 12:05 ` [PATCH v3 4/5] dt-bindings: pci/qcom,pcie: support additional MSI interrupts Krzysztof Kozlowski
2022-04-27 12:16 ` [PATCH v3 5/5] arm64: dts: qcom: sm8250: provide " Dmitry Baryshkov
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