Re: [PATCH 1/2] clk: hisilicon: add CRG driver Hi3521a SoC

["Marty E. Plummer" <hanetzer@startmail.com>]

On Sun, May 01, 2022 at 10:35:37AM +0200, Krzysztof Kozlowski wrote:
> On 01/05/2022 07:10, Marty E. Plummer wrote:
> > Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
> > generates clock and reset signals used by other module blocks on SoC.
> > 
> >
> (...)
> 
> > +		return;
> > +
> > +	hisi_clk_register_mux(hi3521a_sysctrl_mux_clks,
> > +				ARRAY_SIZE(hi3521a_sysctrl_mux_clks),
> > +				clk_data);
> > +}
> > +CLK_OF_DECLARE(hi3521a_sysctrl, "hisilicon,hi3521a-sysctrl", hi3521a_sysctrl_init);
> Missing bindings.
> 
Assume you mean the Documentation/dt/binding/... file? Will do. I
probably should have prefixed it with RFC, as I'm mostly hoping to get
the attention of the hisi people to see what's the deal with the mtd
reads being borked.
> Best regards,
> Krzysztof