From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Vinod Koul <vkoul@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>
Subject: [PATCH v2] arm64: dts: qcom: sm8450 add ITS device tree node
Date: Mon, 2 May 2022 22:26:04 +0300 [thread overview]
Message-ID: <20220502192604.272686-1-dmitry.baryshkov@linaro.org> (raw)
Add device tree node corresponding to the ITS part of GICv3.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Changes since v1:
- Fixed subject to mention sm8450,
- Reordered properties to follow recommended order.
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 5f17540669b0..c8eeef5bedde 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1693,6 +1693,16 @@ intc: interrupt-controller@17100000 {
reg = <0x0 0x17100000 0x0 0x10000>, /* GICD */
<0x0 0x17180000 0x0 0x200000>; /* GICR * 8 */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic_its: msi-controller@17140000 {
+ compatible = "arm,gic-v3-its";
+ reg = <0x0 0x17140000 0x0 0x20000>;
+ msi-controller;
+ #msi-cells = <1>;
+ };
};
timer@17420000 {
--
2.35.1
next reply other threads:[~2022-05-02 19:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-02 19:26 Dmitry Baryshkov [this message]
2022-06-27 20:02 ` (subset) [PATCH v2] arm64: dts: qcom: sm8450 add ITS device tree node Bjorn Andersson
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