From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Tomasz Figa <tfiga@chromium.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>,
Hsin-Yi Wang <hsinyi@chromium.org>, <yong.wu@mediatek.com>,
<youlin.pei@mediatek.com>, <anan.sun@mediatek.com>,
<xueqi.zhang@mediatek.com>, <yen-chang.chen@mediatek.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
<mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>,
<libo.kang@mediatek.com>, <chengci.xu@mediatek.com>
Subject: [PATCH v7 23/36] iommu/mediatek: Add mt8195 support
Date: Tue, 3 May 2022 15:14:14 +0800 [thread overview]
Message-ID: <20220503071427.2285-24-yong.wu@mediatek.com> (raw)
In-Reply-To: <20220503071427.2285-1-yong.wu@mediatek.com>
mt8195 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/iommu/mtk_iommu.c | 41 +++++++++++++++++++++++++++++++++++++++
drivers/iommu/mtk_iommu.h | 1 +
2 files changed, 42 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index d63fe28c1403..47355010502e 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1233,6 +1233,44 @@ static const struct mtk_iommu_plat_data mt8192_data = {
{0, 14, 16}, {0, 13, 18, 17}},
};
+static const struct mtk_iommu_plat_data mt8195_data_infra = {
+ .m4u_plat = M4U_MT8195,
+ .flags = WR_THROT_EN | DCM_DISABLE | STD_AXI_MODE | PM_CLK_AO |
+ MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,
+ .pericfg_comp_str = "mediatek,mt8195-pericfg_ao",
+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
+ .iova_region = single_domain,
+ .iova_region_nr = ARRAY_SIZE(single_domain),
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vdo = {
+ .m4u_plat = M4U_MT8195,
+ .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
+ WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+ .hw_list = &m4ulist,
+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
+ .iova_region = mt8192_multi_dom,
+ .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+ .larbid_remap = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},
+ {13, 17, 15/* 17b */, 25}, {5}},
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vpp = {
+ .m4u_plat = M4U_MT8195,
+ .flags = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+ WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+ .hw_list = &m4ulist,
+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
+ .iova_region = mt8192_multi_dom,
+ .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+ .larbid_remap = {{1}, {3},
+ {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},
+ {8}, {20}, {12},
+ /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */
+ {14, 16, 29, 26, 30, 31, 18},
+ {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
+};
+
static const struct of_device_id mtk_iommu_of_ids[] = {
{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1240,6 +1278,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
+ { .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
+ { .compatible = "mediatek,mt8195-iommu-vdo", .data = &mt8195_data_vdo},
+ { .compatible = "mediatek,mt8195-iommu-vpp", .data = &mt8195_data_vpp},
{}
};
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 56838fad8c73..f2ee11cd254a 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -46,6 +46,7 @@ enum mtk_iommu_plat {
M4U_MT8173,
M4U_MT8183,
M4U_MT8192,
+ M4U_MT8195,
};
struct mtk_iommu_iova_region;
--
2.18.0
next prev parent reply other threads:[~2022-05-03 7:18 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 7:13 [PATCH v7 00/36] MT8195 and MT8186 IOMMU SUPPORT Yong Wu
2022-05-03 7:13 ` [PATCH v7 01/36] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2022-05-03 7:13 ` [PATCH v7 02/36] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2022-05-03 7:13 ` [PATCH v7 03/36] dt-bindings: mediatek: mt8186: Add binding for MM iommu Yong Wu
2022-05-03 7:13 ` [PATCH v7 04/36] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2022-05-03 7:13 ` [PATCH v7 05/36] iommu/mediatek: Add list_del in mtk_iommu_remove Yong Wu
2022-05-03 7:13 ` [PATCH v7 06/36] iommu/mediatek: Remove clk_disable " Yong Wu
2022-05-03 7:13 ` [PATCH v7 07/36] iommu/mediatek: Add mutex for m4u_group and m4u_dom in data Yong Wu
2022-05-03 7:13 ` [PATCH v7 08/36] iommu/mediatek: Add mutex for data in the mtk_iommu_domain Yong Wu
2022-05-03 7:14 ` [PATCH v7 09/36] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2022-05-03 7:14 ` [PATCH v7 10/36] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2022-05-03 7:14 ` [PATCH v7 11/36] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2022-05-03 7:14 ` [PATCH v7 12/36] iommu/mediatek: Add a flag STD_AXI_MODE Yong Wu
2022-05-03 7:14 ` [PATCH v7 13/36] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2022-05-03 7:14 ` [PATCH v7 14/36] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2022-05-03 7:14 ` [PATCH v7 15/36] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2022-05-03 7:14 ` [PATCH v7 16/36] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2022-05-03 7:14 ` [PATCH v7 17/36] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2022-05-03 7:14 ` [PATCH v7 18/36] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2022-05-03 7:14 ` [PATCH v7 19/36] iommu/mediatek: Allow IOMMU_DOMAIN_UNMANAGED for PCIe VFIO Yong Wu
2022-05-03 7:14 ` [PATCH v7 20/36] iommu/mediatek: Add a PM_CLK_AO flag for infra iommu Yong Wu
2022-05-03 7:14 ` [PATCH v7 21/36] iommu/mediatek: Add infra iommu support Yong Wu
2022-05-03 7:14 ` [PATCH v7 22/36] iommu/mediatek: Add PCIe support Yong Wu
2022-05-03 7:14 ` Yong Wu [this message]
2022-05-03 7:14 ` [PATCH v7 24/36] iommu/mediatek: Only adjust code about register base Yong Wu
2022-05-03 7:14 ` [PATCH v7 25/36] iommu/mediatek: Just move code position in hw_init Yong Wu
2022-05-03 7:14 ` [PATCH v7 26/36] iommu/mediatek: Separate mtk_iommu_data for v1 and v2 Yong Wu
2022-05-03 7:14 ` [PATCH v7 27/36] iommu/mediatek: Remove mtk_iommu.h Yong Wu
2022-05-03 7:14 ` [PATCH v7 28/36] iommu/mediatek-v1: Just rename mtk_iommu to mtk_iommu_v1 Yong Wu
2022-05-03 7:14 ` [PATCH v7 29/36] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2022-05-03 7:14 ` [PATCH v7 30/36] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2022-05-03 7:14 ` [PATCH v7 31/36] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2022-05-03 7:14 ` [PATCH v7 32/36] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2022-05-03 7:14 ` [PATCH v7 33/36] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2022-05-03 7:14 ` [PATCH v7 34/36] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2022-05-03 7:14 ` [PATCH v7 35/36] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu
2022-05-03 7:14 ` [PATCH v7 36/36] iommu/mediatek: Add mt8186 iommu support Yong Wu
2022-05-03 15:42 ` [PATCH v7 00/36] MT8195 and MT8186 IOMMU SUPPORT Matthias Brugger
2022-05-04 8:40 ` Joerg Roedel
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