From: Rob Herring <robh@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Serge Semin" <fancer.lancer@gmail.com>,
"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
"Frank Li" <Frank.Li@nxp.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 13/17] PCI: dwc: Verify in/out regions against iATU constraints
Date: Mon, 16 May 2022 16:07:04 -0500 [thread overview]
Message-ID: <20220516210704.GI3209795-robh@kernel.org> (raw)
In-Reply-To: <20220503214638.1895-14-Sergey.Semin@baikalelectronics.ru>
On Wed, May 04, 2022 at 12:46:34AM +0300, Serge Semin wrote:
> Since the DWC PCIe driver private data now contains the iATU inbound and
> outbound regions constraints info like alignment, minimum and maximum
> limits, we can use them to make the in- and outbound iATU regions setup
> methods more strict to the ranges a callee tries to specify. That will
> give us the safer dw_pcie_prog_outbound_atu(),
> dw_pcie_prog_ep_outbound_atu() and dw_pcie_prog_inbound_atu() functions.
>
> First of all let's update the outbound ATU entries setup methods to
> returning the operation status. The methods will fail either in case if
> the range is failed to be activated or the passed region doesn't fulfill
> iATU constraints. Secondly the passed to the
> dw_pcie_prog_{ep_}outbound_atu() methods region-related parameters are
> verified against the detected iATU regions constraints. In particular the
> region limit address must not overflow the lower/upper limit CSR RW-fields
> otherwise the specified range will be just silently clamped. That
> verification will also protect the code from having u64 type overflow.
> Secondly let's make sure base address (CPU-address), target address
> (PCI-address) and size are properly aligned. Unaligned ranges will be
> silently aligned down (addresses) and up (limit) on writing the values to
> the corresponding registers, which in it turn may lead to unpredictable
> results like ranges virtual overlap. Finally the CPU-address alignment
> needs to be verified in the dw_pcie_prog_inbound_atu() method too as the
> DWC PCIe RC/EP registers manual demands seeing the lower bits of the in-
> and outbound iATU base address are always zeros.
>
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 39 +++++++++++++-------
> drivers/pci/controller/dwc/pcie-designware.h | 10 ++---
> 2 files changed, 30 insertions(+), 19 deletions(-)
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2022-05-16 21:14 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 21:46 [PATCH v2 00/17] PCI: dwc: Add dma-ranges/YAML-schema/Baikal-T1 support Serge Semin
2022-05-03 21:46 ` [PATCH v2 01/17] dt-bindings: PCI: dwc: Define common and native DT bindings Serge Semin
2022-05-16 20:11 ` Rob Herring
2022-05-19 10:26 ` Serge Semin
2022-05-03 21:46 ` [PATCH v2 02/17] dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings Serge Semin
2022-05-03 21:46 ` [PATCH v2 03/17] PCI: dwc: Add more verbose link-up message Serge Semin
2022-05-16 20:18 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 04/17] PCI: dwc: Detect iATU settings after getting "addr_space" resource Serge Semin
2022-05-16 20:21 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 05/17] PCI: dwc: Convert to using native IP-core versions representation Serge Semin
2022-05-16 20:30 ` Rob Herring
2022-05-20 9:29 ` Serge Semin
2022-05-20 15:06 ` Rob Herring
2022-05-20 16:08 ` Serge Semin
2022-05-16 20:31 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 06/17] PCI: dwc: Add IP-core version detection procedure Serge Semin
2022-05-16 20:32 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 07/17] PCI: dwc: Introduce Synopsys IP-core versions/types interface Serge Semin
2022-05-16 20:33 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 08/17] PCI: dwc: Add host de-initialization callback Serge Semin
2022-05-16 20:48 ` Rob Herring
2022-05-20 10:20 ` Serge Semin
2022-05-03 21:46 ` [PATCH v2 09/17] PCI: dwc: Drop inbound iATU types enumeration - dw_pcie_as_type Serge Semin
2022-05-03 21:46 ` [PATCH v2 10/17] PCI: dwc: Drop iATU regions enumeration - dw_pcie_region_type Serge Semin
2022-05-16 20:49 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 11/17] PCI: dwc: Simplify in/outbound iATU setup methods Serge Semin
2022-05-12 14:01 ` Manivannan Sadhasivam
2022-05-12 19:22 ` Serge Semin
2022-05-03 21:46 ` [PATCH v2 12/17] PCI: dwc: Add iATU regions size detection procedure Serge Semin
2022-05-16 21:01 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 13/17] PCI: dwc: Verify in/out regions against iATU constraints Serge Semin
2022-05-16 21:07 ` Rob Herring [this message]
2022-05-03 21:46 ` [PATCH v2 14/17] PCI: dwc: Check iATU in/outbound ranges setup methods status Serge Semin
2022-05-16 21:35 ` Rob Herring
2022-05-20 10:36 ` Serge Semin
2022-05-03 21:46 ` [PATCH v2 15/17] PCI: dwc: Introduce dma-ranges property support for RC-host Serge Semin
2022-05-12 13:57 ` Manivannan Sadhasivam
2022-05-12 19:41 ` Serge Semin
2022-05-17 17:20 ` Manivannan Sadhasivam
2022-05-18 19:26 ` Serge Semin
2022-05-19 7:40 ` Manivannan Sadhasivam
2022-05-19 10:52 ` Serge Semin
2022-05-19 15:21 ` Manivannan Sadhasivam
2022-05-20 18:21 ` Serge Semin
2022-05-16 21:42 ` Rob Herring
2022-05-03 21:46 ` [PATCH v2 16/17] PCI: dwc: Introduce generic platform clocks and resets sets Serge Semin
2022-05-16 22:29 ` Rob Herring
2022-05-20 16:02 ` Serge Semin
2022-05-03 21:46 ` [PATCH v2 17/17] PCI: dwc: Add Baikal-T1 PCIe controller support Serge Semin
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