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In-Reply-To: <b5ca5d417be079a2a40a6e79ac1b246b6359a49e.1652329411.git.qinjian@cqplus1.com>
References: <cover.1652329411.git.qinjian@cqplus1.com> <b5ca5d417be079a2a40a6e79ac1b246b6359a49e.1652329411.git.qinjian@cqplus1.com>
Subject: Re: [PATCH v15 04/10] dt-bindings: clock: Add bindings for SP7021 clock driver
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     krzysztof.kozlowski@linaro.org, robh+dt@kernel.org,
        mturquette@baylibre.com, tglx@linutronix.de, maz@kernel.org,
        p.zabel@pengutronix.de, linux@armlinux.org.uk, arnd@arndb.de,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
        Qin Jian <qinjian@cqplus1.com>
To:     Qin Jian <qinjian@cqplus1.com>
Date:   Mon, 16 May 2022 19:19:16 -0700
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Quoting Qin Jian (2022-05-11 23:30:59)
> +
> +    extclk: osc0 {
> +      compatible =3D "fixed-clock";
> +      #clock-cells =3D <0>;
> +      clock-frequency =3D <27000000>;
> +      clock-output-names =3D "extclk";
> +    };
> +
> +    clkc: clock-controller@9c000000 {
> +      compatible =3D "sunplus,sp7021-clkc";
> +      reg =3D <0x9c000000 0x280>;

The question is what other device compatible is in here? The reset
controller?

> +      clocks =3D <&extclk>;
> +      #clock-cells =3D <1>;
> +    };
> +