* [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board
@ 2022-05-21 15:07 Marek Vasut
2022-06-12 0:30 ` Shawn Guo
0 siblings, 1 reply; 3+ messages in thread
From: Marek Vasut @ 2022-05-21 15:07 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Fabio Estevam, Marcel Ziswiler, Peng Fan,
Rob Herring, Shawn Guo, NXP Linux Team, devicetree
Add SNVS LPGPR bindings on this system, the LPGPR is used to store
boot counter.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
---
NOTE: Depends on
https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20
---
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
index 92eaf4ef45638..6956c9bb992be 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
@@ -303,6 +303,12 @@ &sai2 {
status = "disabled";
};
+&snvs {
+ snvs-lpgpr {
+ compatible = "fsl,imx7d-snvs-lpgpr";
+ };
+};
+
&uart1 {
uart-has-rtscts;
status = "okay";
--
2.35.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board
2022-05-21 15:07 [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board Marek Vasut
@ 2022-06-12 0:30 ` Shawn Guo
2022-06-12 10:12 ` Marek Vasut
0 siblings, 1 reply; 3+ messages in thread
From: Shawn Guo @ 2022-06-12 0:30 UTC (permalink / raw)
To: Marek Vasut
Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan,
Rob Herring, NXP Linux Team, devicetree
On Sat, May 21, 2022 at 05:07:50PM +0200, Marek Vasut wrote:
> Add SNVS LPGPR bindings on this system, the LPGPR is used to store
> boot counter.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <festevam@denx.de>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: devicetree@vger.kernel.org
> To: linux-arm-kernel@lists.infradead.org
> ---
> NOTE: Depends on
> https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20
> ---
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
> index 92eaf4ef45638..6956c9bb992be 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
> @@ -303,6 +303,12 @@ &sai2 {
> status = "disabled";
> };
>
> +&snvs {
> + snvs-lpgpr {
> + compatible = "fsl,imx7d-snvs-lpgpr";
Should we encode imx8mm specific compatible as well, while you added it
in the bindings?
Also this is a SoC rather than board device, so we may want to add it in
soc.dtsi instead?
Shawn
> + };
> +};
> +
> &uart1 {
> uart-has-rtscts;
> status = "okay";
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board
2022-06-12 0:30 ` Shawn Guo
@ 2022-06-12 10:12 ` Marek Vasut
0 siblings, 0 replies; 3+ messages in thread
From: Marek Vasut @ 2022-06-12 10:12 UTC (permalink / raw)
To: Shawn Guo
Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan,
Rob Herring, NXP Linux Team, devicetree
On 6/12/22 02:30, Shawn Guo wrote:
> On Sat, May 21, 2022 at 05:07:50PM +0200, Marek Vasut wrote:
>> Add SNVS LPGPR bindings on this system, the LPGPR is used to store
>> boot counter.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Fabio Estevam <festevam@denx.de>
>> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
>> Cc: Peng Fan <peng.fan@nxp.com>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> Cc: Shawn Guo <shawnguo@kernel.org>
>> Cc: NXP Linux Team <linux-imx@nxp.com>
>> Cc: devicetree@vger.kernel.org
>> To: linux-arm-kernel@lists.infradead.org
>> ---
>> NOTE: Depends on
>> https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20
>> ---
>> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
>> index 92eaf4ef45638..6956c9bb992be 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
>> @@ -303,6 +303,12 @@ &sai2 {
>> status = "disabled";
>> };
>>
>> +&snvs {
>> + snvs-lpgpr {
>> + compatible = "fsl,imx7d-snvs-lpgpr";
>
> Should we encode imx8mm specific compatible as well, while you added it
> in the bindings?
>
> Also this is a SoC rather than board device, so we may want to add it in
> soc.dtsi instead?
Right, this patch is already superseded by
[PATCH] arm64: dts: imx8mm: Add SNVS LPGPR
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-05-21 15:07 [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board Marek Vasut
2022-06-12 0:30 ` Shawn Guo
2022-06-12 10:12 ` Marek Vasut
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