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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id bj39-20020a05680819a700b0032b7b588f3asm195674oib.46.2022.05.25.19.05.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 19:05:30 -0700 (PDT) Received: (nullmailer pid 2907659 invoked by uid 1000); Thu, 26 May 2022 02:05:29 -0000 Date: Wed, 25 May 2022 21:05:29 -0500 From: Rob Herring To: Alexandre Bailon Cc: rafael@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amitk@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, mka@chromium.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, james.lo@mediatek.com, fan.chen@mediatek.com, louis.yu@mediatek.com, rex-bc.chen@mediatek.com Subject: Re: [PATCH v7 2/6] dt-bindings: thermal: Add binding document for LVTS thermal controllers Message-ID: <20220526020529.GA2901912-robh@kernel.org> References: <20220524152552.246193-1-abailon@baylibre.com> <20220524152552.246193-3-abailon@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220524152552.246193-3-abailon@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, May 24, 2022 at 05:25:49PM +0200, Alexandre Bailon wrote: > This patch adds binding document for mt8192 and mt8195 thermal > controllers. > > Signed-off-by: Alexandre Bailon > --- > .../thermal/mediatek,mt8192-lvts.yaml | 81 +++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml b/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml > new file mode 100644 > index 000000000000..914c877d1f2f > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml > @@ -0,0 +1,81 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/mediatek,mt8192-lvts.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek SoC LVTS thermal controller > + > +maintainers: > + - Yu-Chia Chang > + - Ben Tseng > + > +allOf: > + - $ref: thermal-sensor.yaml# > + - $ref: /nvmem/nvmem-consumer.yaml# Besides having an error, there is no need to reference this. It is applied to all nodes and you still have to list the properties here to define how many entries and what they are. > + > +properties: > + compatible: > + enum: > + - mediatek,mt8192-lvts > + - mediatek,mt8195-lvts > + > + reg: > + minItems: 2 > + maxItems: 4 > + > + interrupts: > + maxItems: 2 > + > + clocks: > + maxItems: 1 > + > + "#thermal-sensor-cells": > + const: 1 > + > + nvmem-cells: > + maxItems: 2 > + description: Calibration data for thermal sensors Need to define what each entry is. > + > + nvmem-cell-names: > + items: > + - const: e_data1 > + - const: e_data2 Wow, those are useful names. > + > + resets: > + $ref: /schemas/types.yaml#/definitions/phandle-array Already has a type. Need to define how many entries and what each one is (if more than 1). > + > + > +required: > + - '#thermal-sensor-cells' > + - compatible > + - reg > + - interrupts > + - clocks > + - nvmem-cells > + - nvmem-cell-names > + - resets > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + #include > + > + lvts: lvts@1100b000 { Drop unused label. thermal-sensor@... > + compatible = "mediatek,mt8195-lvts"; > + #thermal-sensor-cells = <1>; > + reg = <0 0x1100b000 0 0x1000>, > + <0 0x11278000 0 0x1000>; > + interrupts = , > + ; > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > + resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>, > + <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > + nvmem-cells = <&lvts_e_data1 &lvts_e_data2>; > + nvmem-cell-names = "e_data1","e_data2"; > + }; > +... > -- > 2.35.1 > >