* [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node
2022-05-31 11:45 [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Fabien Parent
@ 2022-05-31 11:45 ` Fabien Parent
2022-06-06 14:32 ` AngeloGioacchino Del Regno
2022-07-01 7:25 ` Uwe Kleine-König
2022-06-05 21:29 ` [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Rob Herring
` (3 subsequent siblings)
4 siblings, 2 replies; 9+ messages in thread
From: Fabien Parent @ 2022-05-31 11:45 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger
Cc: Fabien Parent, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel
MT8195's PWM IP has 4 PWM blocks.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index d076a376bdcc..366543f27a99 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -367,6 +367,21 @@ pwrap: pwrap@10024000 {
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
+ pwm0: pwm@10048000 {
+ compatible = "mediatek,mt8195-pwm",
+ "mediatek,mt8183-pwm";
+ reg = <0 0x10048000 0 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_PWM_H>,
+ <&infracfg_ao CLK_INFRA_AO_PWM>,
+ <&infracfg_ao CLK_INFRA_AO_PWM1>,
+ <&infracfg_ao CLK_INFRA_AO_PWM2>,
+ <&infracfg_ao CLK_INFRA_AO_PWM3>,
+ <&infracfg_ao CLK_INFRA_AO_PWM4>;
+ clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
+ "pwm4";
+ };
+
scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8195-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
--
2.36.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node
2022-05-31 11:45 ` [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node Fabien Parent
@ 2022-06-06 14:32 ` AngeloGioacchino Del Regno
2022-07-01 7:25 ` Uwe Kleine-König
1 sibling, 0 replies; 9+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-06-06 14:32 UTC (permalink / raw)
To: Fabien Parent, Rob Herring, Krzysztof Kozlowski, Matthias Brugger
Cc: devicetree, linux-arm-kernel, linux-mediatek, linux-kernel
Il 31/05/22 13:45, Fabien Parent ha scritto:
> MT8195's PWM IP has 4 PWM blocks.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
I've verified that the binding is actually right - and it is, the MT8183
data is a perfect match with MT8195.
In any case, there are at least a few MT8195 boards on which the PWM controller
is not used (only the disp-pwm one is used), so please set this node as disabled
by default, after which, you get my:
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index d076a376bdcc..366543f27a99 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -367,6 +367,21 @@ pwrap: pwrap@10024000 {
> assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
> };
>
> + pwm0: pwm@10048000 {
> + compatible = "mediatek,mt8195-pwm",
> + "mediatek,mt8183-pwm";
> + reg = <0 0x10048000 0 0x1000>;
> + #pwm-cells = <2>;
> + clocks = <&infracfg_ao CLK_INFRA_AO_PWM_H>,
> + <&infracfg_ao CLK_INFRA_AO_PWM>,
> + <&infracfg_ao CLK_INFRA_AO_PWM1>,
> + <&infracfg_ao CLK_INFRA_AO_PWM2>,
> + <&infracfg_ao CLK_INFRA_AO_PWM3>,
> + <&infracfg_ao CLK_INFRA_AO_PWM4>;
> + clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
> + "pwm4";
> + };
> +
> scp_adsp: clock-controller@10720000 {
> compatible = "mediatek,mt8195-scp_adsp";
> reg = <0 0x10720000 0 0x1000>;
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node
2022-05-31 11:45 ` [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node Fabien Parent
2022-06-06 14:32 ` AngeloGioacchino Del Regno
@ 2022-07-01 7:25 ` Uwe Kleine-König
2022-07-01 13:23 ` Uwe Kleine-König
1 sibling, 1 reply; 9+ messages in thread
From: Uwe Kleine-König @ 2022-07-01 7:25 UTC (permalink / raw)
To: Fabien Parent
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, devicetree,
linux-arm-kernel, linux-mediatek, linux-kernel, linux-pwm
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Hello,
On Tue, May 31, 2022 at 01:45:44PM +0200, Fabien Parent wrote:
> MT8195's PWM IP has 4 PWM blocks.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index d076a376bdcc..366543f27a99 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -367,6 +367,21 @@ pwrap: pwrap@10024000 {
> assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
> };
>
> + pwm0: pwm@10048000 {
> + compatible = "mediatek,mt8195-pwm",
> + "mediatek,mt8183-pwm";
> + reg = <0 0x10048000 0 0x1000>;
> + #pwm-cells = <2>;
> + clocks = <&infracfg_ao CLK_INFRA_AO_PWM_H>,
> + <&infracfg_ao CLK_INFRA_AO_PWM>,
> + <&infracfg_ao CLK_INFRA_AO_PWM1>,
> + <&infracfg_ao CLK_INFRA_AO_PWM2>,
> + <&infracfg_ao CLK_INFRA_AO_PWM3>,
> + <&infracfg_ao CLK_INFRA_AO_PWM4>;
> + clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
> + "pwm4";
> + };
> +
I wonder why will pick up this patch? Will patch 1 then go the same
path, or is that one supposed to go via the pwm tree?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node
2022-07-01 7:25 ` Uwe Kleine-König
@ 2022-07-01 13:23 ` Uwe Kleine-König
0 siblings, 0 replies; 9+ messages in thread
From: Uwe Kleine-König @ 2022-07-01 13:23 UTC (permalink / raw)
To: Fabien Parent
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, devicetree,
linux-arm-kernel, linux-mediatek, linux-kernel, linux-pwm
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Hello,
On Fri, Jul 01, 2022 at 09:25:00AM +0200, Uwe Kleine-König wrote:
> I wonder why will pick up this patch? Will patch 1 then go the same
I think my question is clear, but in case it's not: s/why/who/
> path, or is that one supposed to go via the pwm tree?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195
2022-05-31 11:45 [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Fabien Parent
2022-05-31 11:45 ` [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node Fabien Parent
@ 2022-06-05 21:29 ` Rob Herring
2022-06-06 14:28 ` AngeloGioacchino Del Regno
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2022-06-05 21:29 UTC (permalink / raw)
To: Fabien Parent
Cc: devicetree, Krzysztof Kozlowski, linux-pwm, linux-mediatek,
Matthias Brugger, Rob Herring, linux-arm-kernel, Lee Jones,
Uwe Kleine-König, Thierry Reding, linux-kernel
On Tue, 31 May 2022 13:45:43 +0200, Fabien Parent wrote:
> MT8195's PWM IP is compatible with the MT8183 PWM IP.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195
2022-05-31 11:45 [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Fabien Parent
2022-05-31 11:45 ` [PATCH 2/2] arm64: dts: mediatek: mt8195: add pwm node Fabien Parent
2022-06-05 21:29 ` [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Rob Herring
@ 2022-06-06 14:28 ` AngeloGioacchino Del Regno
2022-07-01 7:22 ` Uwe Kleine-König
2022-07-28 17:15 ` Thierry Reding
4 siblings, 0 replies; 9+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-06-06 14:28 UTC (permalink / raw)
To: Fabien Parent, Thierry Reding, Uwe Kleine-König, Lee Jones,
Rob Herring, Krzysztof Kozlowski, Matthias Brugger
Cc: linux-pwm, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
Il 31/05/22 13:45, Fabien Parent ha scritto:
> MT8195's PWM IP is compatible with the MT8183 PWM IP.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195
2022-05-31 11:45 [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Fabien Parent
` (2 preceding siblings ...)
2022-06-06 14:28 ` AngeloGioacchino Del Regno
@ 2022-07-01 7:22 ` Uwe Kleine-König
2022-07-28 17:15 ` Thierry Reding
4 siblings, 0 replies; 9+ messages in thread
From: Uwe Kleine-König @ 2022-07-01 7:22 UTC (permalink / raw)
To: Fabien Parent
Cc: Thierry Reding, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, linux-pwm, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek
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On Tue, May 31, 2022 at 01:45:43PM +0200, Fabien Parent wrote:
> MT8195's PWM IP is compatible with the MT8183 PWM IP.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
> index 25ed214473d7..7b53355470d6 100644
> --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
> +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
> @@ -8,6 +8,7 @@ Required properties:
> - "mediatek,mt7628-pwm": found on mt7628 SoC.
> - "mediatek,mt7629-pwm": found on mt7629 SoC.
> - "mediatek,mt8183-pwm": found on mt8183 SoC.
> + - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm": found on mt8195 SoC.
> - "mediatek,mt8516-pwm": found on mt8516 SoC.
> - reg: physical base address and length of the controller's registers.
> - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
Looks good to me:
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195
2022-05-31 11:45 [PATCH 1/2] dt-bindings: pwm: mediatek: add pwm binding for MT8195 Fabien Parent
` (3 preceding siblings ...)
2022-07-01 7:22 ` Uwe Kleine-König
@ 2022-07-28 17:15 ` Thierry Reding
4 siblings, 0 replies; 9+ messages in thread
From: Thierry Reding @ 2022-07-28 17:15 UTC (permalink / raw)
To: Fabien Parent
Cc: Uwe Kleine-König, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Matthias Brugger, linux-pwm, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
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On Tue, May 31, 2022 at 01:45:43PM +0200, Fabien Parent wrote:
> MT8195's PWM IP is compatible with the MT8183 PWM IP.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
Thierry
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^ permalink raw reply [flat|nested] 9+ messages in thread