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From: Bjorn Helgaas <helgaas@kernel.org>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
	bhelgaas@google.com, michals@xilinx.com, robh@kernel.org
Subject: Re: [PATCH v4 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root Port
Date: Wed, 8 Jun 2022 14:14:37 -0500	[thread overview]
Message-ID: <20220608191437.GA411770@bhelgaas> (raw)
In-Reply-To: <20220608164046.3474-3-bharat.kumar.gogada@xilinx.com>

On Wed, Jun 08, 2022 at 10:10:46PM +0530, Bharat Kumar Gogada wrote:
> Xilinx Versal Premium series has CPM5 block which supports Root Port
> functioning at Gen5 speed.
> 
> Xilinx Versal CPM5 has few changes with existing CPM block.
> - CPM5 has dedicated register space for control and status registers.
> - CPM5 legacy interrupt handling needs additional register bit
>   to enable and handle legacy interrupts.
> 
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
> ---
>  drivers/pci/controller/pcie-xilinx-cpm.c | 33 +++++++++++++++++++++++-
>  1 file changed, 32 insertions(+), 1 deletion(-)

Per MAINTAINERS, xilinx-cpm lacks a maintainer.  Can we get one?

> diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c
> index c7cd44ed4dfc..a3b04083b6b3 100644
> --- a/drivers/pci/controller/pcie-xilinx-cpm.c
> +++ b/drivers/pci/controller/pcie-xilinx-cpm.c
> @@ -35,6 +35,10 @@
>  #define XILINX_CPM_PCIE_MISC_IR_ENABLE	0x00000348
>  #define XILINX_CPM_PCIE_MISC_IR_LOCAL	BIT(1)
>  
> +#define XILINX_CPM_PCIE_IR_STATUS       0x000002A0
> +#define XILINX_CPM_PCIE_IR_ENABLE       0x000002A8
> +#define XILINX_CPM_PCIE_IR_LOCAL        BIT(0)
> +
>  /* Interrupt registers definitions */
>  #define XILINX_CPM_PCIE_INTR_LINK_DOWN		0
>  #define XILINX_CPM_PCIE_INTR_HOT_RESET		3
> @@ -109,6 +113,7 @@
>   * @intx_irq: legacy interrupt number
>   * @irq: Error interrupt number
>   * @lock: lock protecting shared register access
> + * @is_cpm5: value to check cpm version

s/cpm version/CPM version/ to match commit log usage.

> +	port->is_cpm5 = of_device_is_compatible(dev->of_node,
> +						"xlnx,versal-cpm5-host");

One use of of_device_is_compatible() is OK, I guess, but
of_device_get_match_data() is a better pattern if we ever need more.

I would lean toward of_device_get_match_data() even here, just to
reduce the number of ways to identify device-specific things across
drivers.

Bjorn

  reply	other threads:[~2022-06-08 19:14 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-08 16:40 [PATCH v4 0/2] Add support for Xilinx Versal CPM5 Root Port Bharat Kumar Gogada
2022-06-08 16:40 ` [PATCH v4 1/2] dt-bindings: PCI: xilinx-cpm: Add " Bharat Kumar Gogada
2022-06-09 21:10   ` Rob Herring
2022-06-10  8:50     ` Bharat Kumar Gogada
2022-06-08 16:40 ` [PATCH v4 2/2] PCI: xilinx-cpm: Add support for " Bharat Kumar Gogada
2022-06-08 19:14   ` Bjorn Helgaas [this message]
2022-06-09  7:59     ` Michal Simek
2022-06-09 17:32       ` Bjorn Helgaas
2022-06-10  8:49         ` Bharat Kumar Gogada
2022-06-10  8:47     ` Bharat Kumar Gogada

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