From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21B53C43334 for ; Sun, 12 Jun 2022 00:30:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232790AbiFLAaw (ORCPT ); Sat, 11 Jun 2022 20:30:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231936AbiFLAav (ORCPT ); Sat, 11 Jun 2022 20:30:51 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 243533FBD2 for ; Sat, 11 Jun 2022 17:30:50 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D67A7B80B3E for ; Sun, 12 Jun 2022 00:30:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E955CC34116; Sun, 12 Jun 2022 00:30:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1654993847; bh=TM9rth8nPqrjpHY/lA97AuyYwSUyWxhqnLW8j1anpc4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=F+OcAkhcXT2VWu7sUgbIN/YAJy3DYcDM4zpWiK0GgGYwypuHk3C6lo1VysQGm0SbV 45+UoAOrpN51mE2GFsqq1mR3mZNRm0pdS5qJbtk2tCR9S730Q9eHkPa9/LVX16A1/R LeVD1ZR3RHHxNx2SuYHMqK6HR3C+hRx36WNarcWJeCruQT/qLlpWQdrmr5HW+ra6wf a9gfbgpZNlTxJe7NITwG8QAgu8o8YDXpnb6snrLIb8UcthFy4fKyO7FLpLMH5ovYY8 4wQIswSZs21XZhXmjqsAmLAyxZ1chbYPo3hEnmP2aCKKiQ5fclC5wJbtrvQEiPXvyV sfFaXBRmySd5Q== Date: Sun, 12 Jun 2022 08:30:41 +0800 From: Shawn Guo To: Marek Vasut Cc: linux-arm-kernel@lists.infradead.org, Fabio Estevam , Marcel Ziswiler , Peng Fan , Rob Herring , NXP Linux Team , devicetree@vger.kernel.org Subject: Re: [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board Message-ID: <20220612003041.GK254723@dragon> References: <20220521150750.93718-1-marex@denx.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220521150750.93718-1-marex@denx.de> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sat, May 21, 2022 at 05:07:50PM +0200, Marek Vasut wrote: > Add SNVS LPGPR bindings on this system, the LPGPR is used to store > boot counter. > > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Marcel Ziswiler > Cc: Peng Fan > Cc: Rob Herring > Cc: Shawn Guo > Cc: NXP Linux Team > Cc: devicetree@vger.kernel.org > To: linux-arm-kernel@lists.infradead.org > --- > NOTE: Depends on > https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20 > --- > arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts > index 92eaf4ef45638..6956c9bb992be 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts > @@ -303,6 +303,12 @@ &sai2 { > status = "disabled"; > }; > > +&snvs { > + snvs-lpgpr { > + compatible = "fsl,imx7d-snvs-lpgpr"; Should we encode imx8mm specific compatible as well, while you added it in the bindings? Also this is a SoC rather than board device, so we may want to add it in soc.dtsi instead? Shawn > + }; > +}; > + > &uart1 { > uart-has-rtscts; > status = "okay"; > -- > 2.35.1 >