From: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org
Cc: "Ray Jui" <rjui@broadcom.com>,
"Scott Branden" <sbranden@broadcom.com>,
bcm-kernel-feedback-list@broadcom.com,
"Shawn Guo" <shawnguo@kernel.org>, "Li Yang" <leoyang.li@nxp.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
kernel@pengutronix.de, "Fabio Estevam" <festevam@gmail.com>,
linux-imx@nxp.com, "Wei Xu" <xuwei5@hisilicon.com>,
"Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <bjorn.andersson@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>, "Nishanth Menon" <nm@ti.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Tero Kristo" <kristo@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org,
linux-rockchip@lists.infradead.org,
"Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Subject: [PATCH 3/6] arm64: dts: freescale: Add missing space around properties
Date: Mon, 13 Jun 2022 00:31:58 +0200 [thread overview]
Message-ID: <20220612223201.2740248-4-niklas.soderlund+renesas@ragnatech.se> (raw)
In-Reply-To: <20220612223201.2740248-1-niklas.soderlund+renesas@ragnatech.se>
Add the missing space around properties before the typo spreads to other
files.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++----
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++----
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++----
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
.../arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 6 +++---
8 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 92465f7776035a14..d4b719c8a0b93faf 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -120,13 +120,13 @@ pmu {
};
gic: interrupt-controller@6000000 {
- compatible= "arm,gic-v3";
+ compatible = "arm,gic-v3";
#address-cells = <2>;
#size-cells = <2>;
ranges;
- reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */
+ reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
<0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
- #interrupt-cells= <3>;
+ #interrupt-cells = <3>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>;
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index a79f42a9618ec55f..3e335b4664980189 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -54,7 +54,7 @@ usdhc2: mmc@5b020000 {
clock-names = "ipg", "per", "ahb";
power-domains = <&pd IMX_SC_R_SDHC_1>;
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 1bf070473829244d..eb02244fa55441be 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -212,7 +212,7 @@ clk_ext3: clock-ext3 {
clk_ext4: clock-ext4 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency= <133000000>;
+ clock-frequency = <133000000>;
clock-output-names = "clk_ext4";
};
@@ -995,7 +995,7 @@ usdhc1: mmc@30b40000 {
<&clk IMX8MM_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -1009,7 +1009,7 @@ usdhc2: mmc@30b50000 {
<&clk IMX8MM_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -1023,7 +1023,7 @@ usdhc3: mmc@30b60000 {
<&clk IMX8MM_CLK_USDHC3_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index e41e1d56f980d511..130c6d90dd79bb4d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -212,7 +212,7 @@ clk_ext3: clock-ext3 {
clk_ext4: clock-ext4 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency= <133000000>;
+ clock-frequency = <133000000>;
clock-output-names = "clk_ext4";
};
@@ -941,7 +941,7 @@ usdhc1: mmc@30b40000 {
<&clk IMX8MN_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -955,7 +955,7 @@ usdhc2: mmc@30b50000 {
<&clk IMX8MN_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -969,7 +969,7 @@ usdhc3: mmc@30b60000 {
<&clk IMX8MN_CLK_USDHC3_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index d9542dfff83fba78..b2f4a5f1f73cbe15 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -195,7 +195,7 @@ clk_ext3: clock-ext3 {
clk_ext4: clock-ext4 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency= <133000000>;
+ clock-frequency = <133000000>;
clock-output-names = "clk_ext4";
};
@@ -903,7 +903,7 @@ usdhc1: mmc@30b40000 {
<&clk IMX8MP_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -917,7 +917,7 @@ usdhc2: mmc@30b50000 {
<&clk IMX8MP_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -931,7 +931,7 @@ usdhc3: mmc@30b60000 {
<&clk IMX8MP_CLK_USDHC3_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 49eadb081b19860e..0c74c2a4a40f7615 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -94,7 +94,7 @@ clk_ext3: clock-ext3 {
clk_ext4: clock-ext4 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency= <133000000>;
+ clock-frequency = <133000000>;
clock-output-names = "clk_ext4";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
index 144fc9e82da751c6..e3f161a10448e007 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
@@ -38,17 +38,17 @@ rtc_i2c: rtc@68 {
/* Colibri UART_B */
&lpuart0 {
- status= "okay";
+ status = "okay";
};
/* Colibri UART_C */
&lpuart2 {
- status= "okay";
+ status = "okay";
};
/* Colibri UART_A */
&lpuart3 {
- status= "okay";
+ status = "okay";
};
/* Colibri FastEthernet */
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 09f7364dd1d05a11..ba281e689cf6ed26 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -331,7 +331,7 @@ usdhc0: mmc@298d0000 {
clock-names = "ipg", "ahb", "per";
power-domains = <&scmi_devpd IMX8ULP_PD_USDHC0>;
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -346,7 +346,7 @@ usdhc1: mmc@298e0000 {
clock-names = "ipg", "ahb", "per";
power-domains = <&scmi_devpd IMX8ULP_PD_USDHC1>;
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
@@ -361,7 +361,7 @@ usdhc2: mmc@298f0000 {
clock-names = "ipg", "ahb", "per";
power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
fsl,tuning-start-tap = <20>;
- fsl,tuning-step= <2>;
+ fsl,tuning-step = <2>;
bus-width = <4>;
status = "disabled";
};
--
2.36.1
next prev parent reply other threads:[~2022-06-12 22:33 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-12 22:31 [PATCH 0/6] arm64: dts: Add missing space around properties Niklas Söderlund
2022-06-12 22:31 ` [PATCH 1/6] arm64: dts: broadcom: Add missing space around status property Niklas Söderlund
2022-06-13 16:49 ` Florian Fainelli
2022-06-12 22:31 ` [PATCH 2/6] arm64: dts: rockchip: Add missing space around regulator-name property Niklas Söderlund
2022-06-12 22:31 ` Niklas Söderlund [this message]
2022-06-16 0:15 ` [PATCH 3/6] arm64: dts: freescale: Add missing space around properties Krzysztof Kozlowski
2022-06-12 22:31 ` [PATCH 4/6] arm64: dts: hisilicon: " Niklas Söderlund
2022-06-16 0:15 ` Krzysztof Kozlowski
2022-06-12 22:32 ` [PATCH 5/6] arm64: dts: qcom: " Niklas Söderlund
2022-06-16 0:16 ` Krzysztof Kozlowski
2022-06-12 22:32 ` [PATCH 6/6] arm64: dts: ti: " Niklas Söderlund
2022-06-16 0:16 ` Krzysztof Kozlowski
2022-06-12 22:58 ` (subset) [PATCH 0/6] arm64: dts: " Heiko Stuebner
2022-06-16 0:14 ` Krzysztof Kozlowski
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