From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23ECDCCA479 for ; Thu, 16 Jun 2022 01:53:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244905AbiFPBxE (ORCPT ); Wed, 15 Jun 2022 21:53:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358182AbiFPBw2 (ORCPT ); Wed, 15 Jun 2022 21:52:28 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18FB81034; Wed, 15 Jun 2022 18:52:28 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B5E4BB8216D; Thu, 16 Jun 2022 01:52:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4057EC3411A; Thu, 16 Jun 2022 01:52:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655344345; bh=oMOT4fNM9EtPSen/0ajnw5VdG22IoOCLKi4ywBvuMjc=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=ptG+xUeC9J2/gQhUmVdBMq8POvO4UGjm3NI3uofTPZrBtRdm+4rd8xyjLNlTPJbGy /mydvsG1A6QFaG3rEUqu7Iw4D/DZnQa0+d8n4nLmstWL40EmiO5bf8d5bCj8PNV5qZ MkyI7IDffnwqW27GK4FcToD4dGvQ3GV2yMO5gg/4W4h5d9ky34uPR8BHV6zqbhdMCt GN2t+eKI56jsVns0QEQ6XLzCCABggP8QIl2pL+sUpAWod5TQE7be5bdKxy1a6JFNkz X6WmgM7G2Z9m8nJQC24bPzExAPbn8hSznx+C4SgXvUK/lAW3qrT33U0ZmHEjqnj4iJ 6a6vaKPNuAOcA== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20220523093346.28493-11-rex-bc.chen@mediatek.com> References: <20220523093346.28493-1-rex-bc.chen@mediatek.com> <20220523093346.28493-11-rex-bc.chen@mediatek.com> Subject: Re: [RESEND v8 10/19] clk: mediatek: reset: Add new register reset function with device From: Stephen Boyd Cc: p.zabel@pengutronix.de, angelogioacchino.delregno@collabora.com, nfraprado@collabora.com, chun-jie.chen@mediatek.com, wenst@chromium.org, runyang.chen@mediatek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, Rex-BC Chen To: Rex-BC Chen , krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, mturquette@baylibre.com, robh+dt@kernel.org Date: Wed, 15 Jun 2022 18:52:22 -0700 User-Agent: alot/0.10 Message-Id: <20220616015225.4057EC3411A@smtp.kernel.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Quoting Rex-BC Chen (2022-05-23 02:33:37) > Using device to register reset controller is a better implementation in > current drivers. Howerver, some clock drviers of MediaTek only provide > device_node. >=20 > Therefore, we still remain the register reset function with device_node > and add a new function with device to register reset controller. >=20 > Signed-off-by: Rex-BC Chen > Reviewed-by: AngeloGioacchino Del Regno > Reviewed-by: N=C3=ADcolas F. R. A. Prado > Tested-by: N=C3=ADcolas F. R. A. Prado > --- Applied to clk-next