From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE81ACCA480 for ; Mon, 20 Jun 2022 01:03:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236971AbiFTBDI (ORCPT ); Sun, 19 Jun 2022 21:03:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235521AbiFTBDG (ORCPT ); Sun, 19 Jun 2022 21:03:06 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E896E1027 for ; Sun, 19 Jun 2022 18:03:05 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id b7so10253374ljr.6 for ; Sun, 19 Jun 2022 18:03:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Aq9g/wDzsIqQecRl2cJJ+5IocI39Htj97JGHlen04Z4=; b=rzWWUU/x8NNpQ4kYJA2bz7B4zeXB5TlPFwvd1Dzpr9/2yiGHMMQ6oMRmJYdPDcFKJ7 x7DTkbWx+P6bWWEMdCLW1zsHOC5JczWXdt0huzvyifxRT5iH93gX/JUeZokIlDlFw1P/ 50LXGRU0gJlNjAajBraevzzoSscrhG8DJCDewaNIorLEG5IkZ1zUdxXNpiQnQXqK8UHW aBl5QAURdwuChEPqsjeloudpaZAgVd8mp4GGIBW+EUqh9RNWy2Gw66roJb36ocxbxP6t k8kcdWRhkOmaYp5yoXT/MtLrTKFCr8zE8M5YDCZj/AUp17BwiYJBsCZ8B7ImIopP+IDi U6uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Aq9g/wDzsIqQecRl2cJJ+5IocI39Htj97JGHlen04Z4=; b=K3+YEoOkV41Hm3kfh87iwKXIdMoX72+t/cBTuU6g302AG+5oYiXXTrzXCBMVotwmy6 lmDjLU85dZ8oMaVO88Dthz/QUauNDEKw+ppuN1leaad96avhU9GIUaJGQUP70FWs0w/p FS/zvjUSjmNvklB4s0xfzSzkKdROkj6rfVv8CxgY07mNaMVBh0n7XDuSUnZy0mYeRaB4 iN0Mp4DJWa/Z/bso1Vm2ICqtgd/T+Gi/nedqIRG5jqv6gsZLmFeYamUwNC1Ojmyul5Ht pd1J8pIZS5Wd2lBH+sy6t3lqnxiCSOHZNrxy2Y28MrucB2appVGfMszgMk6cGoBEoJGp hsqQ== X-Gm-Message-State: AJIora+lcrE/54GcUYEWTyRHL2jWGWeIhadPtQ+MT3EAHuVvy2ED27/W M1DNBbs53LW9sgAv9dYikxGDwb16vSEq3CAh X-Google-Smtp-Source: AGRyM1uVUKJ2MrHi+briVhJofI8k8bmYZztVJLPfNEu18XPV559iKEfxeDHvfTNlP5xg79FHoXwuSw== X-Received: by 2002:a2e:a911:0:b0:25a:53dc:82b2 with SMTP id j17-20020a2ea911000000b0025a53dc82b2mr6706463ljq.341.1655686984315; Sun, 19 Jun 2022 18:03:04 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id a1-20020a19e301000000b00477a6c86f17sm1550334lfh.8.2022.06.19.18.03.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jun 2022 18:03:02 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 1/3] dt-bindings: phy: qcom,hdmi-phy-qmp: add clock-cells and XO clock Date: Mon, 20 Jun 2022 04:02:58 +0300 Message-Id: <20220620010300.1532713-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220620010300.1532713-1-dmitry.baryshkov@linaro.org> References: <20220620010300.1532713-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org As the QMP HDMI PHY is a clock provider, add constant #clock-cells property. For the compatibility with older DTs the property is not marked as required. Also add the XO clock to the list of the clocks used by the driver. Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index eea2e02678ed..41e6492d4a0f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -28,12 +28,14 @@ properties: - const: hdmi_phy clocks: - maxItems: 2 + minItems: 2 + maxItems: 3 clock-names: items: - const: iface - const: ref + - const: xo power-domains: maxItems: 1 @@ -44,6 +46,9 @@ properties: vddio-supply: description: phandle to VDD I/O supply regulator + '#clock-cells': + const: 0 + '#phy-cells': const: 0 @@ -75,9 +80,12 @@ examples: "hdmi_phy"; clocks = <&mmcc 116>, - <&gcc 214>; + <&gcc 214>, + <&xo_board>; clock-names = "iface", - "ref"; + "ref", + "xo"; + #clock-cells = <0>; #phy-cells = <0>; vddio-supply = <&vreg_l12a_1p8>; -- 2.35.1