From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 900C5C43334 for ; Mon, 20 Jun 2022 11:07:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241361AbiFTLHx (ORCPT ); Mon, 20 Jun 2022 07:07:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241275AbiFTLHs (ORCPT ); Mon, 20 Jun 2022 07:07:48 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5ABF61582E for ; Mon, 20 Jun 2022 04:07:44 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id o23so4357978ljg.13 for ; Mon, 20 Jun 2022 04:07:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=IxM5Fh4o0hCwPM/3g/Dj/MQgpI2jjFoc6FSkQHRtfDs=; b=AHOXPjXZHoFAqbBm2TMZqN9WxMBQqz2a6nn7o5tJUorYk75b/LBf22WxQefs/rEmb+ V2aNMX7/+LAQXYroOUBXxEduCz7MUNVejG9jsNlHjIRui0Q3WVNxprrdKFE96wUVryLj zGNzC5/kbPsFPIdsHK+qB+g4KTWCpQryMYdDrNgY49UfZdHL1uW5LTi3Lk52wK+DDS/T vX9G8HrBDFI08PghZyl0V0uXUcaALzRpdcyJ0vB1+IIh2zkA4RSJzyyedKJr1i3DYbwC MGOLSRxi9iZAho6Coi3i7hD8YUitI8ZisQi1m1SdUOTNZGipFo+2j5ndZb9pA5fwHvXU RgtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=IxM5Fh4o0hCwPM/3g/Dj/MQgpI2jjFoc6FSkQHRtfDs=; b=Is7dPIuzUbRmDqBrXJ6OFMUTiCDTmwNprpQVtc861lbSvGnM8NSS8nARLLlRo1wHLk QGjcgK1drNxnh35HwkJc1n2IKW3to20bdZ3Vzrw9+g3TDlmQju/ula/xdfr+PL7UCImI CgX72l2HLFk8qOhes7O5ljgQTY8DAcKhyKaGJib5qb1FF4lgX5LmbY2vey7yAA2WOTsM Xz+KKKo9OpsFykXJi2kSGR1Xsh4Rz+WS26cZWbPJU6HUmuqt89MBGeNvjYcSdEA2wEu7 ipOOApZpNiP+4LLS7ShZh1T/PHPq9LPyZydofSy2fnVOl7HQkM0qZjG+FJxiQ/vjdoxw 0tAQ== X-Gm-Message-State: AJIora8ERidXotG85uSaW1VRU88mD9zVxbXAFjf8TDg7ClQUi69iewsY jaSgLXr89/JJ36EestoE0GPNIA== X-Google-Smtp-Source: AGRyM1u4omvimDF5tT7z4eQP21s3HNrizZzAVQBkrRrULB500Rgdz8/vXXUE/UO+Vj9QHFU1nC26Uw== X-Received: by 2002:a2e:bf1c:0:b0:259:f33:a4db with SMTP id c28-20020a2ebf1c000000b002590f33a4dbmr11077336ljr.454.1655723262648; Mon, 20 Jun 2022 04:07:42 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id d19-20020a194f13000000b00479a825aa5esm1722564lfb.154.2022.06.20.04.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jun 2022 04:07:41 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: clock: qcom,gcc-msm8660: separate GCC bindings for MSM8660 Date: Mon, 20 Jun 2022 14:07:36 +0300 Message-Id: <20220620110739.1598514-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Create a separate DT bindings for Global Clock Controller on MSM8660 platform. Signed-off-by: Dmitry Baryshkov --- .../bindings/clock/qcom,gcc-msm8660.yaml | 54 +++++++++++++++++++ .../bindings/clock/qcom,gcc-other.yaml | 3 -- 2 files changed, 54 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml new file mode 100644 index 000000000000..09b2ea60d356 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for MSM8660 + +maintainers: + - Stephen Boyd + - Taniya Das + +description: | + Qualcomm global clock control module which supports the clocks and resets on + MSM8660 + + See also: + - dt-bindings/clock/qcom,gcc-msm8660.h + - dt-bindings/reset/qcom,gcc-msm8660.h + +allOf: + - $ref: "qcom,gcc.yaml#" + +properties: + compatible: + enum: + - qcom,gcc-msm8660 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: pxo + - const: cxo + +required: + - compatible + +unevaluatedProperties: false + +examples: + # Example for GCC for MSM8974: + - | + clock-controller@900000 { + compatible = "qcom,gcc-msm8660"; + reg = <0x900000 0x4000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&pxo_board>, <&cxo_board>; + clock-names = "pxo", "cxo"; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml index 61b90e836b5b..aae83a22b5fb 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml @@ -21,8 +21,6 @@ description: | - dt-bindings/clock/qcom,gcc-msm8939.h - dt-bindings/clock/qcom,gcc-msm8953.h - dt-bindings/reset/qcom,gcc-msm8939.h - - dt-bindings/clock/qcom,gcc-msm8660.h - - dt-bindings/reset/qcom,gcc-msm8660.h - dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) - dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) - dt-bindings/clock/qcom,gcc-mdm9607.h @@ -40,7 +38,6 @@ properties: - qcom,gcc-ipq6018 - qcom,gcc-mdm9607 - qcom,gcc-msm8226 - - qcom,gcc-msm8660 - qcom,gcc-msm8939 - qcom,gcc-msm8953 - qcom,gcc-msm8974 -- 2.35.1