From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AFD9C43334 for ; Thu, 23 Jun 2022 02:42:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229778AbiFWCmo (ORCPT ); Wed, 22 Jun 2022 22:42:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229701AbiFWCmn (ORCPT ); Wed, 22 Jun 2022 22:42:43 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78BF942A10; Wed, 22 Jun 2022 19:42:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655952162; x=1687488162; h=from:to:subject:date:message-id:mime-version: content-transfer-encoding; bh=7c58LfG4TSl0Fs6TzOVpB2DHdxx//cWudkJuL9FQBx4=; b=OaQ5IVl/tHlydeUmL3HMiDZL25b0zFL5feshYGoq62/9Qc6S8CMU6YJE X1Ql+R0KpO1z4IKwSFtBGrB6GeGPsD1CxHWE+IErVJd/5mBpgYyMeGt85 GgSgVpxGHxcj6zfUZp9bnPEPKZH/QW6LEOHnNzFjptc1SkBkY2aFpplO5 1/I4021HJ0Cd425dBMFTNLQN8d7apFPgKCTybm7z8KZoja0HnGNPsAJbZ E5qd8gsWvaxSRIS2O7xK3xCu+TLybgOnwawOHir3Kp15odwpGkPt9O6am 8ak6Kp8/fh/mskIFv9rDHLLYCIWeP1fwv7Q7IveBZJs4ZphC1HYXpN60z g==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="342289221" X-IronPort-AV: E=Sophos;i="5.92,215,1650956400"; d="scan'208";a="342289221" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 19:42:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,215,1650956400"; d="scan'208";a="563271632" Received: from unknown (HELO localhost.localdomain) ([10.226.216.116]) by orsmga006.jf.intel.com with ESMTP; 22 Jun 2022 19:42:39 -0700 From: niravkumar.l.rabara@intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, niravkumar.l.rabara@intel.com Subject: [PATCH] arm64: dts: altera: socfpga_stratix10: move clocks out of soc node Date: Thu, 23 Jun 2022 10:42:21 +0800 Message-Id: <20220623024221.2766255-1-niravkumar.l.rabara@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Niravkumar L Rabara The clocks are not part of the SoC but provided on the board (external oscillators). Moving them out of soc node. Signed-off-by: Niravkumar L Rabara --- .../boot/dts/altera/socfpga_stratix10.dtsi | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index aa2bba75265f..5c7d926d18f7 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -97,6 +97,34 @@ intc: interrupt-controller@fffc1000 { <0x0 0xfffc6000 0x0 0x2000>; }; + clocks { + cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + cb_intosc_ls_clk: cb-intosc-ls-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + f2s_free_clk: f2s-free-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + osc1: osc1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + qspi_clk: qspi-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -119,34 +147,6 @@ clkmgr: clock-controller@ffd10000 { #clock-cells = <1>; }; - clocks { - cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - cb_intosc_ls_clk: cb-intosc-ls-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - f2s_free_clk: f2s-free-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - osc1: osc1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - qspi_clk: qspi-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <200000000>; - }; - }; - gmac0: ethernet@ff800000 { compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; reg = <0xff800000 0x2000>; -- 2.25.1