From: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
To: <alexandre.belloni@bootlin.com>,
<krzysztof.kozlowski+dt@linaro.org>, <robh+dt@kernel.org>,
<nicolas.ferre@microchip.com>
Cc: <arnd@arndb.de>, <soc@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<UNGLinuxDriver@microchip.com>,
<Kavyasree.Kotagiri@microchip.com>
Subject: [PATCH] ARM: dts: lan966x: Add mcan1 node.
Date: Mon, 27 Jun 2022 16:35:52 +0530 [thread overview]
Message-ID: <20220627110552.26315-1-kavyasree.kotagiri@microchip.com> (raw)
Add the mcan1 node. By default, keep it disabled.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
---
arch/arm/boot/dts/lan966x.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 3cb02fffe716..25cfa89dde7b 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -473,6 +473,21 @@
status = "disabled";
};
+ can1: can@e0820000 {
+ compatible = "bosch,m_can";
+ reg = <0xe0820000 0xfc>, <0x00100000 0x8000>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&clks GCK_ID_MCAN1>, <&clks GCK_ID_MCAN1>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&clks GCK_ID_MCAN1>;
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
reset: reset-controller@e200400c {
compatible = "microchip,lan966x-switch-reset";
reg = <0xe200400c 0x4>;
--
2.17.1
next reply other threads:[~2022-06-27 11:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-27 11:05 Kavyasree Kotagiri [this message]
2022-07-01 8:16 ` [PATCH] ARM: dts: lan966x: Add mcan1 node Nicolas Ferre
2022-07-04 6:48 ` Claudiu.Beznea
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