From: Conor Dooley <conor.dooley@microchip.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Conor Dooley <conor.dooley@microchip.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Daire McNamara <daire.mcnamara@microchip.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, Rob Herring <robh@kernel.org>
Subject: [PATCH v2 01/12] dt-bindings: clk: microchip: mpfs: add reset controller support
Date: Mon, 4 Jul 2022 13:15:48 +0100 [thread overview]
Message-ID: <20220704121558.2088698-2-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220704121558.2088698-1-conor.dooley@microchip.com>
The "peripheral" devices on PolarFire SoC can be put into reset, so
update the device tree binding to reflect the presence of a reset
controller.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/clock/microchip,mpfs.yaml | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml
index 016a4f378b9b..1d0b6a4fda42 100644
--- a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml
+++ b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml
@@ -40,8 +40,21 @@ properties:
const: 1
description: |
The clock consumer should specify the desired clock by having the clock
- ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h
- for the full list of PolarFire clock IDs.
+ ID in its "clocks" phandle cell.
+ See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
+ PolarFire clock IDs.
+
+ resets:
+ maxItems: 1
+
+ '#reset-cells':
+ description:
+ The AHB/AXI peripherals on the PolarFire SoC have reset support, so from
+ CLK_ENVM to CLK_CFM. The reset consumer should specify the desired
+ peripheral via the clock ID in its "resets" phandle cell.
+ See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
+ PolarFire clock IDs.
+ const: 1
required:
- compatible
--
2.36.1
next prev parent reply other threads:[~2022-07-04 12:16 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 12:15 [PATCH v2 00/12] PolarFire SoC reset controller & clock cleanups Conor Dooley
2022-07-04 12:15 ` Conor Dooley [this message]
2022-07-04 12:15 ` [PATCH v2 02/12] clk: microchip: mpfs: add reset controller Conor Dooley
2022-07-04 12:15 ` [PATCH v2 03/12] reset: add polarfire soc reset support Conor Dooley
2022-07-18 11:34 ` Conor.Dooley
2022-07-18 15:42 ` Philipp Zabel
2022-07-18 15:44 ` Conor.Dooley
2022-07-04 12:15 ` [PATCH v2 04/12] MAINTAINERS: add polarfire soc reset controller Conor Dooley
2022-07-04 12:15 ` [PATCH v2 05/12] riscv: dts: microchip: add mpfs specific macb reset support Conor Dooley
2022-07-04 12:15 ` [PATCH v2 06/12] clk: microchip: mpfs: add module_authors entries Conor Dooley
2022-07-04 12:15 ` [PATCH v2 07/12] clk: microchip: mpfs: add MSS pll's set & round rate Conor Dooley
2022-07-04 12:15 ` [PATCH v2 08/12] clk: microchip: mpfs: move id & offset out of clock structs Conor Dooley
2022-07-04 12:15 ` [PATCH v2 09/12] clk: microchip: mpfs: simplify control reg access Conor Dooley
2022-07-04 12:15 ` [PATCH v2 10/12] clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() Conor Dooley
2022-07-04 12:15 ` [PATCH v2 11/12] clk: microchip: mpfs: convert cfg_clk to clk_divider Conor Dooley
2022-07-04 12:15 ` [PATCH v2 12/12] clk: microchip: mpfs: convert periph_clk to clk_gate Conor Dooley
2022-07-20 13:46 ` [PATCH v2 00/12] PolarFire SoC reset controller & clock cleanups Conor.Dooley
2022-08-09 23:05 ` Conor.Dooley
2022-08-10 18:56 ` Nathan Chancellor
2022-08-10 19:20 ` Conor.Dooley
2022-08-10 19:32 ` Nathan Chancellor
2022-08-10 19:43 ` Conor.Dooley
2022-08-11 13:13 ` Conor.Dooley
2022-08-14 11:41 ` Conor.Dooley
2022-08-17 12:17 ` Conor.Dooley
2022-08-17 16:18 ` Nathan Chancellor
2022-08-10 11:50 ` Daire.McNamara
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220704121558.2088698-2-conor.dooley@microchip.com \
--to=conor.dooley@microchip.com \
--cc=aou@eecs.berkeley.edu \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).