From: Conor Dooley <conor.dooley@microchip.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Conor Dooley <conor.dooley@microchip.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Daire McNamara <daire.mcnamara@microchip.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: [PATCH v2 04/12] MAINTAINERS: add polarfire soc reset controller
Date: Mon, 4 Jul 2022 13:15:51 +0100 [thread overview]
Message-ID: <20220704121558.2088698-5-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220704121558.2088698-1-conor.dooley@microchip.com>
Add the newly added reset controller for the PolarFire SoC (MPFS) to
the existing MAINTAINERS entry.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1fc9ead83d2a..7b82ffce6c22 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17159,6 +17159,7 @@ L: linux-riscv@lists.infradead.org
S: Supported
F: arch/riscv/boot/dts/microchip/
F: drivers/mailbox/mailbox-mpfs.c
+F: drivers/reset/reset-mpfs.c
F: drivers/soc/microchip/
F: include/soc/microchip/mpfs.h
--
2.36.1
next prev parent reply other threads:[~2022-07-04 12:16 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 12:15 [PATCH v2 00/12] PolarFire SoC reset controller & clock cleanups Conor Dooley
2022-07-04 12:15 ` [PATCH v2 01/12] dt-bindings: clk: microchip: mpfs: add reset controller support Conor Dooley
2022-07-04 12:15 ` [PATCH v2 02/12] clk: microchip: mpfs: add reset controller Conor Dooley
2022-07-04 12:15 ` [PATCH v2 03/12] reset: add polarfire soc reset support Conor Dooley
2022-07-18 11:34 ` Conor.Dooley
2022-07-18 15:42 ` Philipp Zabel
2022-07-18 15:44 ` Conor.Dooley
2022-07-04 12:15 ` Conor Dooley [this message]
2022-07-04 12:15 ` [PATCH v2 05/12] riscv: dts: microchip: add mpfs specific macb " Conor Dooley
2022-07-04 12:15 ` [PATCH v2 06/12] clk: microchip: mpfs: add module_authors entries Conor Dooley
2022-07-04 12:15 ` [PATCH v2 07/12] clk: microchip: mpfs: add MSS pll's set & round rate Conor Dooley
2022-07-04 12:15 ` [PATCH v2 08/12] clk: microchip: mpfs: move id & offset out of clock structs Conor Dooley
2022-07-04 12:15 ` [PATCH v2 09/12] clk: microchip: mpfs: simplify control reg access Conor Dooley
2022-07-04 12:15 ` [PATCH v2 10/12] clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() Conor Dooley
2022-07-04 12:15 ` [PATCH v2 11/12] clk: microchip: mpfs: convert cfg_clk to clk_divider Conor Dooley
2022-07-04 12:15 ` [PATCH v2 12/12] clk: microchip: mpfs: convert periph_clk to clk_gate Conor Dooley
2022-07-20 13:46 ` [PATCH v2 00/12] PolarFire SoC reset controller & clock cleanups Conor.Dooley
2022-08-09 23:05 ` Conor.Dooley
2022-08-10 18:56 ` Nathan Chancellor
2022-08-10 19:20 ` Conor.Dooley
2022-08-10 19:32 ` Nathan Chancellor
2022-08-10 19:43 ` Conor.Dooley
2022-08-11 13:13 ` Conor.Dooley
2022-08-14 11:41 ` Conor.Dooley
2022-08-17 12:17 ` Conor.Dooley
2022-08-17 16:18 ` Nathan Chancellor
2022-08-10 11:50 ` Daire.McNamara
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