From: Michael Walle <michael@walle.cc>
To: herve.codina@bootlin.com
Cc: alexandre.belloni@bootlin.com, claudiu.beznea@microchip.com,
devicetree@vger.kernel.org, gregkh@linuxfoundation.org,
horatiu.vultur@microchip.com, krzysztof.kozlowski+dt@linaro.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
mturquette@baylibre.com, nicolas.ferre@microchip.com,
robh+dt@kernel.org, sboyd@kernel.org,
thomas.petazzoni@bootlin.com, Michael Walle <michael@walle.cc>
Subject: Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address
Date: Tue, 5 Jul 2022 15:00:36 +0200 [thread overview]
Message-ID: <20220705130036.1384656-1-michael@walle.cc> (raw)
In-Reply-To: <20220704102845.168438-2-herve.codina@bootlin.com>
> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
>
> Use the correct clock gate register address.
>
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Tested-by: Michael Walle <michael@walle.cc>
next prev parent reply other threads:[~2022-07-05 13:40 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 10:28 [PATCH v5 0/3] Microchip LAN966x USB device support Herve Codina
2022-07-04 10:28 ` [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address Herve Codina
2022-07-05 8:51 ` Claudiu.Beznea
2022-07-05 13:00 ` Michael Walle [this message]
2022-07-19 7:04 ` Stephen Boyd
2022-07-04 10:28 ` [PATCH v5 2/3] dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string Herve Codina
2022-07-05 7:48 ` Claudiu.Beznea
2022-07-04 10:28 ` [PATCH v5 3/3] ARM: dts: lan966x: Add UDPHS support Herve Codina
2022-07-05 7:48 ` Claudiu.Beznea
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