From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B896FC43334 for ; Tue, 5 Jul 2022 13:43:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233096AbiGENnI (ORCPT ); Tue, 5 Jul 2022 09:43:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233551AbiGENml (ORCPT ); Tue, 5 Jul 2022 09:42:41 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12A852BB3D; Tue, 5 Jul 2022 06:06:46 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 3323C2223E; Tue, 5 Jul 2022 15:06:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1657026404; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=/IavIY2Vrj9IH8y51eRTI7LcQe0kKgpAF4T5aTj0Ys0=; b=sum74IDF9ZBTp/16YfE5rCYgc28RRad0BZrhYJgl7R1Ram5kWJg7DP40R//N0mTNvXpUja zEwlTwoQfH8R7iptTBykCkPLgvYSXrN0A3O5pBbzsDEOz4ZI2q91kYTkqU5wS22djF27c4 mTo4UtQhpMFootFYIZmZx88nkQztK1M= From: Michael Walle To: Rob Herring , Krzysztof Kozlowski , Claudiu Beznea , Nicolas Ferre , Alexandre Belloni Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH 1/2] ARM: dts: lan966x: add clock gating register Date: Tue, 5 Jul 2022 15:06:36 +0200 Message-Id: <20220705130637.1386120-1-michael@walle.cc> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The clock controller supports an optional clock gating register. This is necessary to expose the USB device clock, for example. Add it. Signed-off-by: Michael Walle --- arch/arm/boot/dts/lan966x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index a5d456fa4e04..ab70b7ad1c5d 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -65,7 +65,7 @@ clks: clock-controller@e00c00a8 { #clock-cells = <1>; clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; clock-names = "cpu", "ddr", "sys"; - reg = <0xe00c00a8 0x38>; + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; }; timer { -- 2.30.2