* [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
@ 2022-07-05 17:54 Marek Behún
2022-07-05 19:18 ` Rob Herring
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Marek Behún @ 2022-07-05 17:54 UTC (permalink / raw)
To: devicetree, Rob Herring; +Cc: pali, Marek Behún
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
CPLD Design.
Signed-off-by: Marek Behún <kabel@kernel.org>
---
.../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
diff --git a/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
new file mode 100644
index 000000000000..822dfb93dcd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design
+
+maintainers:
+ - Pali Rohár <pali@kernel.org>
+
+description: |
+ A simple bus enabling access to peripherals on boards with use Freescale
+ P1021RDB Combo Board CPLD Design.
+
+ The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as
+ specified in the Devicetree Specification. It is an extension of "simple-bus"
+ because some registers are CPLD specific and allows to identify if board has
+ wired CPLD according to Freescale P1021RDB Combo Board CPLD Design.
+
+select:
+ properties:
+ compatible:
+ contains:
+ const: fsl,p1021rdb-pc-cpld
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$"
+
+ compatible:
+ items:
+ - const: fsl,p1021rdb-pc-cpld
+ - const: simple-bus
+
+ '#address-cells':
+ enum: [ 1, 2 ]
+
+ '#size-cells':
+ enum: [ 1, 2 ]
+
+ reg:
+ maxItems: 1
+
+ ranges: true
+
+required:
+ - compatible
+ - '#address-cells'
+ - '#size-cells'
+ - reg
+ - ranges
+
+additionalProperties:
+ type: object
+
+examples:
+ - |
+
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ cpld@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p1021rdb-pc-cpld", "simple-bus";
+ reg = <0x3 0x0 0x20000>;
+ ranges = <0x0 0x3 0x0 0x20000>;
+ };
+ };
--
2.35.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-07-05 17:54 [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld Marek Behún
@ 2022-07-05 19:18 ` Rob Herring
2022-07-05 20:09 ` Rob Herring
2022-08-31 11:46 ` Pali Rohár
2 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2022-07-05 19:18 UTC (permalink / raw)
To: Marek Behún; +Cc: devicetree, pali, Rob Herring
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1292 bytes --]
On Tue, 05 Jul 2022 19:54:50 +0200, Marek Behún wrote:
> Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
> CPLD Design.
>
> Signed-off-by: Marek Behún <kabel@kernel.org>
> ---
> .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.example.dtb: cpld@3,0: $nodename:0: 'cpld@3,0' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
From schema: /usr/local/lib/python3.10/dist-packages/dtschema/schemas/simple-bus.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-07-05 17:54 [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld Marek Behún
2022-07-05 19:18 ` Rob Herring
@ 2022-07-05 20:09 ` Rob Herring
2022-07-06 16:56 ` Marek Behún
2022-08-31 11:46 ` Pali Rohár
2 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2022-07-05 20:09 UTC (permalink / raw)
To: Marek Behún; +Cc: devicetree, Pali Rohár
On Tue, Jul 5, 2022 at 11:54 AM Marek Behún <kabel@kernel.org> wrote:
>
> Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
> CPLD Design.
>
> Signed-off-by: Marek Behún <kabel@kernel.org>
> ---
> .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> new file mode 100644
> index 000000000000..822dfb93dcd8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design
> +
> +maintainers:
> + - Pali Rohár <pali@kernel.org>
> +
> +description: |
> + A simple bus enabling access to peripherals on boards with use Freescale
> + P1021RDB Combo Board CPLD Design.
> +
> + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as
> + specified in the Devicetree Specification. It is an extension of "simple-bus"
> + because some registers are CPLD specific and allows to identify if board has
> + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design.
> +
> +select:
> + properties:
> + compatible:
> + contains:
> + const: fsl,p1021rdb-pc-cpld
> + required:
> + - compatible
> +
> +properties:
> + $nodename:
> + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$"
> +
> + compatible:
> + items:
> + - const: fsl,p1021rdb-pc-cpld
> + - const: simple-bus
> +
> + '#address-cells':
> + enum: [ 1, 2 ]
> +
> + '#size-cells':
> + enum: [ 1, 2 ]
> +
> + reg:
> + maxItems: 1
> +
> + ranges: true
> +
> +required:
> + - compatible
> + - '#address-cells'
> + - '#size-cells'
> + - reg
> + - ranges
> +
> +additionalProperties:
> + type: object
> +
> +examples:
> + - |
> +
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + cpld@3,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus";
> + reg = <0x3 0x0 0x20000>;
Not really a simple-bus if it has registers to init/program the bus.
> + ranges = <0x0 0x3 0x0 0x20000>;
> + };
> + };
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-07-05 20:09 ` Rob Herring
@ 2022-07-06 16:56 ` Marek Behún
2022-07-12 17:05 ` Rob Herring
0 siblings, 1 reply; 9+ messages in thread
From: Marek Behún @ 2022-07-06 16:56 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, Pali Rohár
On Tue, 5 Jul 2022 14:09:36 -0600
Rob Herring <robh+dt@kernel.org> wrote:
> Not really a simple-bus if it has registers to init/program the bus.
It doesn't.
Marek
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-07-06 16:56 ` Marek Behún
@ 2022-07-12 17:05 ` Rob Herring
2022-08-18 21:36 ` Pali Rohár
0 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2022-07-12 17:05 UTC (permalink / raw)
To: Marek Behún; +Cc: devicetree, Pali Rohár
On Wed, Jul 06, 2022 at 06:56:02PM +0200, Marek Behún wrote:
> On Tue, 5 Jul 2022 14:09:36 -0600
> Rob Herring <robh+dt@kernel.org> wrote:
>
> > Not really a simple-bus if it has registers to init/program the bus.
>
> It doesn't.
Then what is in 'reg'? It looks the same range as 'ranges', so maybe you
don't need 'reg'.
Rob
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-07-12 17:05 ` Rob Herring
@ 2022-08-18 21:36 ` Pali Rohár
0 siblings, 0 replies; 9+ messages in thread
From: Pali Rohár @ 2022-08-18 21:36 UTC (permalink / raw)
To: Rob Herring; +Cc: Marek Behún, devicetree
On Tuesday 12 July 2022 11:05:35 Rob Herring wrote:
> On Wed, Jul 06, 2022 at 06:56:02PM +0200, Marek Behún wrote:
> > On Tue, 5 Jul 2022 14:09:36 -0600
> > Rob Herring <robh+dt@kernel.org> wrote:
> >
> > > Not really a simple-bus if it has registers to init/program the bus.
> >
> > It doesn't.
>
> Then what is in 'reg'? It looks the same range as 'ranges', so maybe you
> don't need 'reg'.
>
> Rob
Without 'reg' kernel cannot register devices on this bus, e.g.
register-bit-led does not work. So 'reg' is needed. Why? I do not know.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-07-05 17:54 [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld Marek Behún
2022-07-05 19:18 ` Rob Herring
2022-07-05 20:09 ` Rob Herring
@ 2022-08-31 11:46 ` Pali Rohár
2022-10-09 11:38 ` Pali Rohár
2 siblings, 1 reply; 9+ messages in thread
From: Pali Rohár @ 2022-08-31 11:46 UTC (permalink / raw)
To: devicetree, Rob Herring, Marek Behún
PING? Documentation binding patch is waiting there fore two months.
Could we move forward?
Note that meanwhile turris1x.dts which uses this was merged.
On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
> Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
> CPLD Design.
>
> Signed-off-by: Marek Behún <kabel@kernel.org>
> ---
> .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> new file mode 100644
> index 000000000000..822dfb93dcd8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design
> +
> +maintainers:
> + - Pali Rohár <pali@kernel.org>
> +
> +description: |
> + A simple bus enabling access to peripherals on boards with use Freescale
> + P1021RDB Combo Board CPLD Design.
> +
> + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as
> + specified in the Devicetree Specification. It is an extension of "simple-bus"
> + because some registers are CPLD specific and allows to identify if board has
> + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design.
> +
> +select:
> + properties:
> + compatible:
> + contains:
> + const: fsl,p1021rdb-pc-cpld
> + required:
> + - compatible
> +
> +properties:
> + $nodename:
> + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$"
> +
> + compatible:
> + items:
> + - const: fsl,p1021rdb-pc-cpld
> + - const: simple-bus
> +
> + '#address-cells':
> + enum: [ 1, 2 ]
> +
> + '#size-cells':
> + enum: [ 1, 2 ]
> +
> + reg:
> + maxItems: 1
> +
> + ranges: true
> +
> +required:
> + - compatible
> + - '#address-cells'
> + - '#size-cells'
> + - reg
> + - ranges
> +
> +additionalProperties:
> + type: object
> +
> +examples:
> + - |
> +
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + cpld@3,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus";
> + reg = <0x3 0x0 0x20000>;
> + ranges = <0x0 0x3 0x0 0x20000>;
> + };
> + };
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-08-31 11:46 ` Pali Rohár
@ 2022-10-09 11:38 ` Pali Rohár
2022-11-01 22:27 ` Pali Rohár
0 siblings, 1 reply; 9+ messages in thread
From: Pali Rohár @ 2022-10-09 11:38 UTC (permalink / raw)
To: devicetree, Rob Herring, Marek Behún
PING?
If you really do not care about documentation then just tell people to
not waste time on doing it. Because dts files can be compiled and used
on the real hardware without those superfluous YAML files.
On Wednesday 31 August 2022 13:46:40 Pali Rohár wrote:
> PING? Documentation binding patch is waiting there fore two months.
> Could we move forward?
>
> Note that meanwhile turris1x.dts which uses this was merged.
>
> On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
> > Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
> > CPLD Design.
> >
> > Signed-off-by: Marek Behún <kabel@kernel.org>
> > ---
> > .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++
> > 1 file changed, 73 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > new file mode 100644
> > index 000000000000..822dfb93dcd8
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > @@ -0,0 +1,73 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design
> > +
> > +maintainers:
> > + - Pali Rohár <pali@kernel.org>
> > +
> > +description: |
> > + A simple bus enabling access to peripherals on boards with use Freescale
> > + P1021RDB Combo Board CPLD Design.
> > +
> > + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as
> > + specified in the Devicetree Specification. It is an extension of "simple-bus"
> > + because some registers are CPLD specific and allows to identify if board has
> > + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design.
> > +
> > +select:
> > + properties:
> > + compatible:
> > + contains:
> > + const: fsl,p1021rdb-pc-cpld
> > + required:
> > + - compatible
> > +
> > +properties:
> > + $nodename:
> > + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$"
> > +
> > + compatible:
> > + items:
> > + - const: fsl,p1021rdb-pc-cpld
> > + - const: simple-bus
> > +
> > + '#address-cells':
> > + enum: [ 1, 2 ]
> > +
> > + '#size-cells':
> > + enum: [ 1, 2 ]
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + ranges: true
> > +
> > +required:
> > + - compatible
> > + - '#address-cells'
> > + - '#size-cells'
> > + - reg
> > + - ranges
> > +
> > +additionalProperties:
> > + type: object
> > +
> > +examples:
> > + - |
> > +
> > + localbus {
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > +
> > + cpld@3,0 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus";
> > + reg = <0x3 0x0 0x20000>;
> > + ranges = <0x0 0x3 0x0 0x20000>;
> > + };
> > + };
> > --
> > 2.35.1
> >
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
2022-10-09 11:38 ` Pali Rohár
@ 2022-11-01 22:27 ` Pali Rohár
0 siblings, 0 replies; 9+ messages in thread
From: Pali Rohár @ 2022-11-01 22:27 UTC (permalink / raw)
To: devicetree, Rob Herring, Marek Behún
PING?
On Sunday 09 October 2022 13:38:25 Pali Rohár wrote:
> PING?
>
> If you really do not care about documentation then just tell people to
> not waste time on doing it. Because dts files can be compiled and used
> on the real hardware without those superfluous YAML files.
>
> On Wednesday 31 August 2022 13:46:40 Pali Rohár wrote:
> > PING? Documentation binding patch is waiting there fore two months.
> > Could we move forward?
> >
> > Note that meanwhile turris1x.dts which uses this was merged.
> >
> > On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
> > > Add binding for CPLD bus interface of Freescale P1021RDB Combo Board
> > > CPLD Design.
> > >
> > > Signed-off-by: Marek Behún <kabel@kernel.org>
> > > ---
> > > .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++
> > > 1 file changed, 73 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > > new file mode 100644
> > > index 000000000000..822dfb93dcd8
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
> > > @@ -0,0 +1,73 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design
> > > +
> > > +maintainers:
> > > + - Pali Rohár <pali@kernel.org>
> > > +
> > > +description: |
> > > + A simple bus enabling access to peripherals on boards with use Freescale
> > > + P1021RDB Combo Board CPLD Design.
> > > +
> > > + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as
> > > + specified in the Devicetree Specification. It is an extension of "simple-bus"
> > > + because some registers are CPLD specific and allows to identify if board has
> > > + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design.
> > > +
> > > +select:
> > > + properties:
> > > + compatible:
> > > + contains:
> > > + const: fsl,p1021rdb-pc-cpld
> > > + required:
> > > + - compatible
> > > +
> > > +properties:
> > > + $nodename:
> > > + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$"
> > > +
> > > + compatible:
> > > + items:
> > > + - const: fsl,p1021rdb-pc-cpld
> > > + - const: simple-bus
> > > +
> > > + '#address-cells':
> > > + enum: [ 1, 2 ]
> > > +
> > > + '#size-cells':
> > > + enum: [ 1, 2 ]
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > + ranges: true
> > > +
> > > +required:
> > > + - compatible
> > > + - '#address-cells'
> > > + - '#size-cells'
> > > + - reg
> > > + - ranges
> > > +
> > > +additionalProperties:
> > > + type: object
> > > +
> > > +examples:
> > > + - |
> > > +
> > > + localbus {
> > > + #address-cells = <2>;
> > > + #size-cells = <1>;
> > > +
> > > + cpld@3,0 {
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus";
> > > + reg = <0x3 0x0 0x20000>;
> > > + ranges = <0x0 0x3 0x0 0x20000>;
> > > + };
> > > + };
> > > --
> > > 2.35.1
> > >
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-11-01 22:27 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-07-05 17:54 [PATCH] dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld Marek Behún
2022-07-05 19:18 ` Rob Herring
2022-07-05 20:09 ` Rob Herring
2022-07-06 16:56 ` Marek Behún
2022-07-12 17:05 ` Rob Herring
2022-08-18 21:36 ` Pali Rohár
2022-08-31 11:46 ` Pali Rohár
2022-10-09 11:38 ` Pali Rohár
2022-11-01 22:27 ` Pali Rohár
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