From: Robert Foss <robert.foss@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
konrad.dybcio@somainline.org, mturquette@baylibre.com,
sboyd@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, jonathan@marek.ca,
robert.foss@linaro.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Vinod Koul <vkoul@kernel.org>
Subject: [PATCH v8 5/5] arm64: dts: qcom: sm8350: Add DISPCC node
Date: Wed, 6 Jul 2022 17:43:37 +0200 [thread overview]
Message-ID: <20220706154337.2026269-6-robert.foss@linaro.org> (raw)
In-Reply-To: <20220706154337.2026269-1-robert.foss@linaro.org>
Add the dispcc clock-controller DT node for sm8350.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
Changes since v2
- Remove interconnect include - Bjorn
Changes since v3
- Switch from .fw_name to .index
Changes since v5
- Revert .fw_name to .index change
Changes since v6
- Add r-b - Konrad
arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 447a02f10463..aa0ca45ca184 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,dispcc-sm8350.h>
#include <dt-bindings/clock/qcom,gcc-sm8350.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/dma/qcom-gpi.h>
@@ -2531,6 +2532,31 @@ usb_2_dwc3: usb@a800000 {
};
};
+ dispcc: clock-controller@af00000 {
+ compatible = "qcom,sm8350-dispcc";
+ reg = <0 0x0af00000 0 0x10000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>;
+ clock-names = "bi_tcxo",
+ "dsi0_phy_pll_out_byteclk",
+ "dsi0_phy_pll_out_dsiclk",
+ "dsi1_phy_pll_out_byteclk",
+ "dsi1_phy_pll_out_dsiclk",
+ "dp_phy_pll_link_clk",
+ "dp_phy_pll_vco_div_clk";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+
+ power-domains = <&rpmhpd SM8350_MMCX>;
+ power-domain-names = "mmcx";
+ };
+
adsp: remoteproc@17300000 {
compatible = "qcom,sm8350-adsp-pas";
reg = <0 0x17300000 0 0x100>;
--
2.34.1
next prev parent reply other threads:[~2022-07-06 15:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-06 15:43 [PATCH v8 0/5] SM8350 Display/GPU clock enablement Robert Foss
2022-07-06 15:43 ` [PATCH v8 1/5] dt-bindings: clock: Add Qcom SM8350 GPUCC bindings Robert Foss
2022-07-06 15:43 ` [PATCH v8 2/5] clk: qcom: add support for SM8350 GPUCC Robert Foss
2022-07-06 15:43 ` [PATCH v8 3/5] dt-bindings: clock: Add Qcom SM8350 DISPCC bindings Robert Foss
2022-07-06 15:43 ` [PATCH v8 4/5] clk: qcom: add support for SM8350 DISPCC Robert Foss
2022-07-06 15:43 ` Robert Foss [this message]
2022-07-07 2:31 ` (subset) [PATCH v8 5/5] arm64: dts: qcom: sm8350: Add DISPCC node Bjorn Andersson
2022-07-07 2:31 ` (subset) [PATCH v8 0/5] SM8350 Display/GPU clock enablement Bjorn Andersson
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