[PATCH 5/9] dt-bindings: msm/dp: account for clocks specific for qcom,sc7280-edp

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

On SC7280 platform the eDP controller uses an extended amount of clocks.
Since it is the only known platform using such configuration, use
if-then-else rather than listing each and every compatible string in the
if conditions.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 .../bindings/display/msm/dp-controller.yaml   | 60 +++++++++++++++----
 1 file changed, 48 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index f00eae66196f..1ef845005b14 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -38,20 +38,12 @@ properties:
     maxItems: 1
 
   clocks:
-    items:
-      - description: AHB clock to enable register access
-      - description: Display Port AUX clock
-      - description: Display Port Link clock
-      - description: Link interface clock between DP and PHY
-      - description: Display Port Pixel clock
+    minItems: 5
+    maxItems: 7
 
   clock-names:
-    items:
-      - const: core_iface
-      - const: core_aux
-      - const: ctrl_link
-      - const: ctrl_link_iface
-      - const: stream_pixel
+    minItems: 5
+    maxItems: 7
 
   assigned-clocks:
     items:
@@ -119,6 +111,50 @@ required:
   - power-domains
   - ports
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sc7280-edp
+    then:
+      properties:
+        clocks:
+          items:
+            - description: XO clock
+            - description: eDP reference clock
+            - description: AHB clock to enable register access
+            - description: Display Port AUX clock
+            - description: Display Port Link clock
+            - description: Link interface clock between DP and PHY
+            - description: Display Port Pixel clock
+        clock-names:
+          items:
+            - const: core_xo
+            - const: core_ref
+            - const: core_iface
+            - const: core_aux
+            - const: ctrl_link
+            - const: ctrl_link_iface
+            - const: stream_pixel
+    else:
+      properties:
+        clocks:
+          items:
+            - description: AHB clock to enable register access
+            - description: Display Port AUX clock
+            - description: Display Port Link clock
+            - description: Link interface clock between DP and PHY
+            - description: Display Port Pixel clock
+        clock-names:
+          items:
+            - const: core_iface
+            - const: core_aux
+            - const: ctrl_link
+            - const: ctrl_link_iface
+            - const: stream_pixel
+
 additionalProperties: false
 
 examples:
-- 
2.35.1