From: Jiucheng Xu <jiucheng.xu@amlogic.com>
To: <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>, <devicetree@vger.kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Will Deacon <will@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Chris Healy <cphealy@gmail.com>,
Jiucheng Xu <jiucheng.xu@amlogic.com>
Subject: [PATCH 4/4] dt-binding:perf: Add Amlogic DDR PMU
Date: Tue, 12 Jul 2022 14:36:41 +0800 [thread overview]
Message-ID: <20220712063641.2790997-4-jiucheng.xu@amlogic.com> (raw)
In-Reply-To: <20220712063641.2790997-1-jiucheng.xu@amlogic.com>
Add binding documentation for the Amlogic G12 series DDR
performance monitor unit.
Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
---
.../devicetree/bindings/perf/aml-ddr-pmu.yaml | 51 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/aml-ddr-pmu.yaml
diff --git a/Documentation/devicetree/bindings/perf/aml-ddr-pmu.yaml b/Documentation/devicetree/bindings/perf/aml-ddr-pmu.yaml
new file mode 100644
index 000000000000..c586b4ab4009
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/aml-ddr-pmu.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/aml-ddr-pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic G12 DDR performance monitor
+
+maintainers:
+ - Jiucheng Xu <jiucheng.xu@amlogic.com>
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - aml,g12-ddr-pmu
+ - items:
+ - enum:
+ - aml,g12-ddr-pmu
+ - const: aml,g12-ddr-pmu
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - model
+ - dmc_nr
+ - chann_nr
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ ddr_pmu: ddr_pmu {
+ compatible = "amlogic,g12-ddr-pmu";
+ model = "g12a";
+ dmc_nr = <1>;
+ chann_nr = <4>;
+ reg = <0x0 0xff638000 0x0 0x100
+ 0x0 0xff638c00 0x0 0x100>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ddr_pmu";
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index fd2a56a339b4..ac0a1df4622d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1055,6 +1055,7 @@ M: Jiucheng Xu <jiucheng.xu@amlogic.com>
S: Supported
W: http://www.amlogic.com
F: Documentation/admin-guide/perf/aml-ddr-pmu.rst
+F: Documentation/devicetree/bindings/perf/aml-ddr-pmu.yaml
F: drivers/perf/amlogic/
F: include/soc/amlogic/
--
2.25.1
next prev parent reply other threads:[~2022-07-12 6:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-12 6:36 [PATCH 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Jiucheng Xu
2022-07-12 6:36 ` [PATCH 2/4] docs/perf: Add documentation for the Amlogic G12 DDR PMU Jiucheng Xu
2022-07-12 6:36 ` [PATCH 3/4] arm64:dts:meson: Add DDR PMU node Jiucheng Xu
2022-07-12 6:36 ` Jiucheng Xu [this message]
2022-07-12 7:15 ` [PATCH 4/4] dt-binding:perf: Add Amlogic DDR PMU Krzysztof Kozlowski
2022-07-14 3:22 ` Jiucheng Xu
2022-07-12 12:54 ` Robin Murphy
2022-07-14 9:13 ` Jiucheng Xu
2022-07-12 14:26 ` Rob Herring
2022-07-12 12:36 ` [PATCH 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Robin Murphy
2022-07-14 8:17 ` Jiucheng Xu
2022-07-15 16:38 ` Robin Murphy
2022-07-17 20:58 ` Chris Healy
2022-07-18 8:06 ` Neil Armstrong
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