From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
l.stach@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
laurent.pinchart@ideasonboard.com, marex@denx.de,
paul.elder@ideasonboard.com, aford173@gmail.com,
Markus.Niebel@ew.tq-group.com, alexander.stein@ew.tq-group.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, aisheng.dong@nxp.com,
Peng Fan <peng.fan@nxp.com>
Subject: [PATCH 3/6] soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV
Date: Tue, 12 Jul 2022 16:21:43 +0800 [thread overview]
Message-ID: <20220712082146.1192215-4-peng.fan@oss.nxp.com> (raw)
In-Reply-To: <20220712082146.1192215-1-peng.fan@oss.nxp.com>
From: Peng Fan <peng.fan@nxp.com>
i.MX8MP HDMI supports HDCP and HRV, so add them.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/soc/imx/imx8mp-blk-ctrl.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c
index 6f983adcb47c..527d45d12a54 100644
--- a/drivers/soc/imx/imx8mp-blk-ctrl.c
+++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
@@ -235,6 +235,13 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,
regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12));
regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
break;
+ case IMX8MP_HDMIBLK_PD_HDCP:
+ regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
+ break;
+ case IMX8MP_HDMIBLK_PD_HRV:
+ regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));
+ regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));
+ break;
default:
break;
}
@@ -283,6 +290,13 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc,
regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12));
regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24));
break;
+ case IMX8MP_HDMIBLK_PD_HDCP:
+ regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
+ break;
+ case IMX8MP_HDMIBLK_PD_HRV:
+ regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));
+ regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));
+ break;
default:
break;
}
@@ -365,6 +379,22 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] = {
.num_clks = 2,
.gpc_name = "hdmi-tx-phy",
},
+ [IMX8MP_HDMIBLK_PD_HRV] = {
+ .name = "hdmiblk-hrv",
+ .clk_names = (const char *[]){ "axi", "apb" },
+ .num_clks = 2,
+ .gpc_name = "hrv",
+ .path_names = (const char *[]){"hrv"},
+ .num_paths = 1,
+ },
+ [IMX8MP_HDMIBLK_PD_HDCP] = {
+ .name = "hdmiblk-hdcp",
+ .clk_names = (const char *[]){ "axi", "apb" },
+ .num_clks = 2,
+ .gpc_name = "hdcp",
+ .path_names = (const char *[]){"hdcp"},
+ .num_paths = 1,
+ },
};
static const struct imx8mp_blk_ctrl_data imx8mp_hdmi_blk_ctl_dev_data = {
--
2.25.1
next prev parent reply other threads:[~2022-07-12 8:20 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-12 8:21 [PATCH 0/6] imx: add i.MX8MP hdmi blk ctrl hdcp/hrv and vpu blk ctrl Peng Fan (OSS)
2022-07-12 8:21 ` [PATCH 1/6] dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV Peng Fan (OSS)
2022-07-12 8:20 ` Krzysztof Kozlowski
2022-07-12 8:21 ` [PATCH 2/6] dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl Peng Fan (OSS)
2022-07-12 8:21 ` Krzysztof Kozlowski
2022-07-12 12:11 ` Adam Ford
2022-07-12 12:53 ` Peng Fan
2022-07-12 8:21 ` Peng Fan (OSS) [this message]
2022-07-12 8:21 ` [PATCH 4/6] soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU " Peng Fan (OSS)
2022-07-12 8:21 ` [PATCH 5/6] arm64: dts: imx8mp: add vpu pgc nodes Peng Fan (OSS)
2022-07-12 8:21 ` [PATCH 6/6] arm64: dts: imx8mp: add VPU blk ctrl node Peng Fan (OSS)
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