From: Rob Herring <robh@kernel.org>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: bjorn.andersson@linaro.org, linus.walleij@linaro.org,
krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings
Date: Tue, 12 Jul 2022 08:59:57 -0600 [thread overview]
Message-ID: <20220712145957.GB1823936-robh@kernel.org> (raw)
In-Reply-To: <864aac78-d3a4-0008-345f-d210582b100e@linaro.org>
On Fri, Jul 01, 2022 at 11:06:18AM +0100, Srinivas Kandagatla wrote:
> thanks Rob,
>
> On 30/06/2022 22:08, Rob Herring wrote:
> > On Wed, Jun 29, 2022 at 10:17:15AM +0100, Srinivas Kandagatla wrote:
> > > Add device tree binding Documentation details for Qualcomm SM8450
> > > LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver.
> > >
> > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> > > ---
> > > .../qcom,sm8450-lpass-lpi-pinctrl.yaml | 138 ++++++++++++++++++
> > > 1 file changed, 138 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> > > new file mode 100644
> > > index 000000000000..b49d70b9ba9a
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> > > @@ -0,0 +1,138 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
> > > + Low Power Island (LPI) TLMM block
> > > +
> > > +maintainers:
> > > + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> > > +
> > > +description: |
> > > + This binding describes the Top Level Mode Multiplexer block found in the
> > > + LPASS LPI IP on most Qualcomm SoCs
> > > +
> > > +properties:
> > > + compatible:
> > > + const: qcom,sm8450-lpass-lpi-pinctrl
> > > +
> > > + reg:
> > > + minItems: 2
> > > + maxItems: 2
> >
> > What is each entry?
>
> These are tlmm and slew register base address.
>
> This has been like this in previous bindings for sm8250 and sc7280 lpi
> binding.
There's always bad examples to follow.
> Are you suggesting that we should add a description for reg for more
> clarity?
Well, 2 descriptions:
items:
- description: ...
- description: ...
Rob
next prev parent reply other threads:[~2022-07-12 15:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-29 9:17 [PATCH 0/2] pinctrl: add support for SM8450 LPASS LPI pinctrl Srinivas Kandagatla
2022-06-29 9:17 ` [PATCH 1/2] dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings Srinivas Kandagatla
2022-06-30 21:08 ` Rob Herring
2022-07-01 10:06 ` Srinivas Kandagatla
2022-07-12 14:59 ` Rob Herring [this message]
2022-06-29 9:17 ` [PATCH 2/2] pinctrl: qcom: Add sm8450 lpass lpi pinctrl driver Srinivas Kandagatla
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