* [PATCH v2 01/10] ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
@ 2022-07-12 16:40 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 02/10] ARM: dts: dove: " Marek Behún
` (10 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:40 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/kirkwood-6192.dtsi | 14 ++++++++++--
arch/arm/boot/dts/kirkwood-6281.dtsi | 14 ++++++++++--
arch/arm/boot/dts/kirkwood-6282.dtsi | 28 ++++++++++++++++++++----
arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 14 ++++++++++--
4 files changed, 60 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi
index 396bcba08adb..07f4f7f98c0c 100644
--- a/arch/arm/boot/dts/kirkwood-6192.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6192.dtsi
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
+ interrupt-names = "intx";
+ interrupts = <9>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 0>,
+ <0 0 0 2 &pcie_intc 1>,
+ <0 0 0 3 &pcie_intc 2>,
+ <0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>;
status = "disabled";
+
+ pcie_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi
index faa05849a40d..d08a9a5ecc26 100644
--- a/arch/arm/boot/dts/kirkwood-6281.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
+ interrupt-names = "intx";
+ interrupts = <9>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 0>,
+ <0 0 0 2 &pcie_intc 1>,
+ <0 0 0 3 &pcie_intc 2>,
+ <0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>;
status = "disabled";
+
+ pcie_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index e84c54b77dea..2eea5b304f47 100644
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -30,12 +30,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
+ interrupt-names = "intx";
+ interrupts = <9>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+ <0 0 0 2 &pcie0_intc 1>,
+ <0 0 0 3 &pcie0_intc 2>,
+ <0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>;
status = "disabled";
+
+ pcie0_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie1: pcie@2,0 {
@@ -48,12 +58,22 @@ pcie1: pcie@2,0 {
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 10>;
+ interrupt-names = "intx";
+ interrupts = <10>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 18>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
index 299c147298c3..070bc13242b8 100644
--- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
+++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
+ interrupt-names = "intx";
+ interrupts = <9>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 0>,
+ <0 0 0 2 &pcie_intc 1>,
+ <0 0 0 3 &pcie_intc 2>,
+ <0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>;
status = "disabled";
+
+ pcie_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 02/10] ARM: dts: dove: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
2022-07-12 16:40 ` [PATCH v2 01/10] ARM: dts: kirkwood: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 03/10] ARM: dts: armada-370.dtsi: " Marek Behún
` (9 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/dove.dtsi | 28 ++++++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 89e0bdaf3a85..96ba47c061a7 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -122,8 +122,18 @@ pcie0: pcie@1 {
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 16>;
+ interrupt-names = "intx";
+ interrupts = <16>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+ <0 0 0 2 &pcie0_intc 1>,
+ <0 0 0 3 &pcie0_intc 2>,
+ <0 0 0 4 &pcie0_intc 3>;
+
+ pcie0_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie1: pcie@2 {
@@ -141,8 +151,18 @@ pcie1: pcie@2 {
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 18>;
+ interrupt-names = "intx";
+ interrupts = <18>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 03/10] ARM: dts: armada-370.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
2022-07-12 16:40 ` [PATCH v2 01/10] ARM: dts: kirkwood: " Marek Behún
2022-07-12 16:41 ` [PATCH v2 02/10] ARM: dts: dove: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 04/10] ARM: dts: armada-xp-98dx3236.dtsi: " Marek Behún
` (8 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-370.dtsi | 28 ++++++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 46e6d3ed8f35..9dc928859ad3 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -60,16 +60,26 @@ pcie0: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 58>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+ <0 0 0 2 &pcie0_intc 1>,
+ <0 0 0 3 &pcie0_intc 2>,
+ <0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie0_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie2: pcie@2,0 {
@@ -78,16 +88,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 62>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie2_intc 0>,
+ <0 0 0 2 &pcie2_intc 1>,
+ <0 0 0 3 &pcie2_intc 2>,
+ <0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
+
+ pcie2_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 04/10] ARM: dts: armada-xp-98dx3236.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (2 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 03/10] ARM: dts: armada-370.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 05/10] ARM: dts: armada-xp-mv78230.dtsi: " Marek Behún
` (7 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
index 38a052a0312d..b21ffb819b1d 100644
--- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
+++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
@@ -76,16 +76,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 58>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 05/10] ARM: dts: armada-xp-mv78230.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (3 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 04/10] ARM: dts: armada-xp-98dx3236.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 06/10] ARM: dts: armada-xp-mv78260.dtsi: " Marek Behún
` (6 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 70 ++++++++++++++++++++----
1 file changed, 60 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 8558bf6bb54c..bf9360f41e0a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -83,16 +83,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 58>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie2: pcie@2,0 {
@@ -101,16 +111,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 59>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie2_intc 0>,
+ <0 0 0 2 &pcie2_intc 1>,
+ <0 0 0 3 &pcie2_intc 2>,
+ <0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
+
+ pcie2_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie3: pcie@3,0 {
@@ -119,16 +139,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 60>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3_intc 0>,
+ <0 0 0 2 &pcie3_intc 1>,
+ <0 0 0 3 &pcie3_intc 2>,
+ <0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 7>;
status = "disabled";
+
+ pcie3_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie4: pcie@4,0 {
@@ -137,16 +167,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 61>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie4_intc 0>,
+ <0 0 0 2 &pcie4_intc 1>,
+ <0 0 0 3 &pcie4_intc 2>,
+ <0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 8>;
status = "disabled";
+
+ pcie4_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie5: pcie@5,0 {
@@ -155,16 +195,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 62>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie5_intc 0>,
+ <0 0 0 2 &pcie5_intc 1>,
+ <0 0 0 3 &pcie5_intc 2>,
+ <0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
+
+ pcie5_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 06/10] ARM: dts: armada-xp-mv78260.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (4 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 05/10] ARM: dts: armada-xp-mv78230.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 07/10] ARM: dts: armada-xp-mv78460.dtsi: " Marek Behún
` (5 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 126 +++++++++++++++++++----
1 file changed, 108 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 2d85fe8ac327..0714af52e607 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -98,16 +98,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 58>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie2: pcie@2,0 {
@@ -116,16 +126,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 59>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie2_intc 0>,
+ <0 0 0 2 &pcie2_intc 1>,
+ <0 0 0 3 &pcie2_intc 2>,
+ <0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
+
+ pcie2_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie3: pcie@3,0 {
@@ -134,16 +154,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 60>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3_intc 0>,
+ <0 0 0 2 &pcie3_intc 1>,
+ <0 0 0 3 &pcie3_intc 2>,
+ <0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 7>;
status = "disabled";
+
+ pcie3_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie4: pcie@4,0 {
@@ -152,16 +182,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 61>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie4_intc 0>,
+ <0 0 0 2 &pcie4_intc 1>,
+ <0 0 0 3 &pcie4_intc 2>,
+ <0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 8>;
status = "disabled";
+
+ pcie4_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie5: pcie@5,0 {
@@ -170,16 +210,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 62>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie5_intc 0>,
+ <0 0 0 2 &pcie5_intc 1>,
+ <0 0 0 3 &pcie5_intc 2>,
+ <0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
+
+ pcie5_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie6: pcie@6,0 {
@@ -188,16 +238,26 @@ pcie6: pcie@6,0 {
reg = <0x3000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 63>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
0x81000000 0 0 0x81000000 0x6 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 63>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie6_intc 0>,
+ <0 0 0 2 &pcie6_intc 1>,
+ <0 0 0 3 &pcie6_intc 2>,
+ <0 0 0 4 &pcie6_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 10>;
status = "disabled";
+
+ pcie6_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie7: pcie@7,0 {
@@ -206,16 +266,26 @@ pcie7: pcie@7,0 {
reg = <0x3800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 64>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
0x81000000 0 0 0x81000000 0x7 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 64>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie7_intc 0>,
+ <0 0 0 2 &pcie7_intc 1>,
+ <0 0 0 3 &pcie7_intc 2>,
+ <0 0 0 4 &pcie7_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 11>;
status = "disabled";
+
+ pcie7_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie8: pcie@8,0 {
@@ -224,16 +294,26 @@ pcie8: pcie@8,0 {
reg = <0x4000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 65>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
0x81000000 0 0 0x81000000 0x8 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 65>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie8_intc 0>,
+ <0 0 0 2 &pcie8_intc 1>,
+ <0 0 0 3 &pcie8_intc 2>,
+ <0 0 0 4 &pcie8_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 12>;
status = "disabled";
+
+ pcie8_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie9: pcie@9,0 {
@@ -242,16 +322,26 @@ pcie9: pcie@9,0 {
reg = <0x4800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 99>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
0x81000000 0 0 0x81000000 0x9 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 99>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie9_intc 0>,
+ <0 0 0 2 &pcie9_intc 1>,
+ <0 0 0 3 &pcie9_intc 2>,
+ <0 0 0 4 &pcie9_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 26>;
status = "disabled";
+
+ pcie9_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 07/10] ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (5 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 06/10] ARM: dts: armada-xp-mv78260.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 08/10] ARM: dts: armada-375.dtsi: " Marek Behún
` (4 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 140 +++++++++++++++++++----
1 file changed, 120 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 230a3fd36b30..16185edf9aa5 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -119,16 +119,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 58>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie2: pcie@2,0 {
@@ -137,16 +147,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 59>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie2_intc 0>,
+ <0 0 0 2 &pcie2_intc 1>,
+ <0 0 0 3 &pcie2_intc 2>,
+ <0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
+
+ pcie2_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie3: pcie@3,0 {
@@ -155,16 +175,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 60>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3_intc 0>,
+ <0 0 0 2 &pcie3_intc 1>,
+ <0 0 0 3 &pcie3_intc 2>,
+ <0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 7>;
status = "disabled";
+
+ pcie3_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie4: pcie@4,0 {
@@ -173,16 +203,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 61>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie4_intc 0>,
+ <0 0 0 2 &pcie4_intc 1>,
+ <0 0 0 3 &pcie4_intc 2>,
+ <0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 8>;
status = "disabled";
+
+ pcie4_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie5: pcie@5,0 {
@@ -191,16 +231,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 62>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie5_intc 0>,
+ <0 0 0 2 &pcie5_intc 1>,
+ <0 0 0 3 &pcie5_intc 2>,
+ <0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
+
+ pcie5_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie6: pcie@6,0 {
@@ -209,16 +259,26 @@ pcie6: pcie@6,0 {
reg = <0x3000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 63>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
0x81000000 0 0 0x81000000 0x6 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 63>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie6_intc 0>,
+ <0 0 0 2 &pcie6_intc 1>,
+ <0 0 0 3 &pcie6_intc 2>,
+ <0 0 0 4 &pcie6_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 10>;
status = "disabled";
+
+ pcie6_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie7: pcie@7,0 {
@@ -227,16 +287,26 @@ pcie7: pcie@7,0 {
reg = <0x3800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 64>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
0x81000000 0 0 0x81000000 0x7 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 64>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie7_intc 0>,
+ <0 0 0 2 &pcie7_intc 1>,
+ <0 0 0 3 &pcie7_intc 2>,
+ <0 0 0 4 &pcie7_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 11>;
status = "disabled";
+
+ pcie7_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie8: pcie@8,0 {
@@ -245,16 +315,26 @@ pcie8: pcie@8,0 {
reg = <0x4000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 65>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
0x81000000 0 0 0x81000000 0x8 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 65>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie8_intc 0>,
+ <0 0 0 2 &pcie8_intc 1>,
+ <0 0 0 3 &pcie8_intc 2>,
+ <0 0 0 4 &pcie8_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 12>;
status = "disabled";
+
+ pcie8_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie9: pcie@9,0 {
@@ -263,16 +343,26 @@ pcie9: pcie@9,0 {
reg = <0x4800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 99>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
0x81000000 0 0 0x81000000 0x9 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 99>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie9_intc 0>,
+ <0 0 0 2 &pcie9_intc 1>,
+ <0 0 0 3 &pcie9_intc 2>,
+ <0 0 0 4 &pcie9_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 26>;
status = "disabled";
+
+ pcie9_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie10: pcie@a,0 {
@@ -281,16 +371,26 @@ pcie10: pcie@a,0 {
reg = <0x5000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&mpic 103>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
0x81000000 0 0 0x81000000 0xa 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &mpic 103>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie10_intc 0>,
+ <0 0 0 2 &pcie10_intc 1>,
+ <0 0 0 3 &pcie10_intc 2>,
+ <0 0 0 4 &pcie10_intc 3>;
marvell,pcie-port = <3>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 27>;
status = "disabled";
+
+ pcie10_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 08/10] ARM: dts: armada-375.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (6 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 07/10] ARM: dts: armada-xp-mv78460.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 09/10] ARM: dts: armada-380.dtsi: " Marek Behún
` (3 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-375.dtsi | 28 ++++++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index 7f2f24a29e6c..929deaf312a5 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -568,16 +568,26 @@ pcie0: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+ <0 0 0 2 &pcie0_intc 1>,
+ <0 0 0 3 &pcie0_intc 2>,
+ <0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie0_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
pcie1: pcie@2,0 {
@@ -586,16 +596,26 @@ pcie1: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 09/10] ARM: dts: armada-380.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (7 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 08/10] ARM: dts: armada-375.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:41 ` [PATCH v2 10/10] ARM: dts: armada-39x.dtsi: " Marek Behún
` (2 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-380.dtsi | 42 ++++++++++++++++++++++++++-----
1 file changed, 36 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index cff1269f3fbf..ce1dddb2269b 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -64,16 +64,26 @@ pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 8>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
/* x1 port */
@@ -83,16 +93,26 @@ pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie2_intc 0>,
+ <0 0 0 2 &pcie2_intc 1>,
+ <0 0 0 3 &pcie2_intc 2>,
+ <0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie2_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
/* x1 port */
@@ -102,16 +122,26 @@ pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3_intc 0>,
+ <0 0 0 2 &pcie3_intc 1>,
+ <0 0 0 3 &pcie3_intc 2>,
+ <0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 6>;
status = "disabled";
+
+ pcie3_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 10/10] ARM: dts: armada-39x.dtsi: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (8 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 09/10] ARM: dts: armada-380.dtsi: " Marek Behún
@ 2022-07-12 16:41 ` Marek Behún
2022-07-12 16:59 ` [PATCH v2 00/10] ARM: dts: mvebu: " Andrew Lunn
2022-08-17 16:50 ` Pali Rohár
11 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 16:41 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
Cc: Rob Herring, Pali Rohár, linux-arm-kernel, devicetree,
linux-kernel, Marek Behún
From: Pali Rohár <pali@kernel.org>
Add definitions for PCIe legacy INTx interrupts.
This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
arch/arm/boot/dts/armada-39x.dtsi | 56 ++++++++++++++++++++++++++-----
1 file changed, 48 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index e0b7c2099831..923b035a3ab3 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -438,16 +438,26 @@ pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+ <0 0 0 2 &pcie1_intc 1>,
+ <0 0 0 3 &pcie1_intc 2>,
+ <0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 8>;
status = "disabled";
+
+ pcie1_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
/* x1 port */
@@ -457,16 +467,26 @@ pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie2_intc 0>,
+ <0 0 0 2 &pcie2_intc 1>,
+ <0 0 0 3 &pcie2_intc 2>,
+ <0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
+
+ pcie2_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
/* x1 port */
@@ -476,16 +496,26 @@ pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3_intc 0>,
+ <0 0 0 2 &pcie3_intc 1>,
+ <0 0 0 3 &pcie3_intc 2>,
+ <0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 6>;
status = "disabled";
+
+ pcie3_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
/*
@@ -498,16 +528,26 @@ pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+ interrupt-names = "intx";
+ interrupts-extended = <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie4_intc 0>,
+ <0 0 0 2 &pcie4_intc 1>,
+ <0 0 0 3 &pcie4_intc 2>,
+ <0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <3>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 7>;
status = "disabled";
+
+ pcie4_intc: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (9 preceding siblings ...)
2022-07-12 16:41 ` [PATCH v2 10/10] ARM: dts: armada-39x.dtsi: " Marek Behún
@ 2022-07-12 16:59 ` Andrew Lunn
2022-07-12 22:23 ` Marek Behún
2022-08-17 16:50 ` Pali Rohár
11 siblings, 1 reply; 15+ messages in thread
From: Andrew Lunn @ 2022-07-12 16:59 UTC (permalink / raw)
To: Marek Behún
Cc: Gregory Clement, Sebastian Hesselbarth, Rob Herring,
Pali Rohár, linux-arm-kernel, devicetree, linux-kernel
On Tue, Jul 12, 2022 at 06:40:58PM +0200, Marek Behún wrote:
> As suggested by Gregory [1] (although he suggested it only for armada
> 380), add definitions for PCIe legacy INTx interrupts into every DTS
> file used by the pci-mvebu.c controller driver.
>
> It was tested on 88F6820 (A385) and 88F6281 (Kirkwood) SoCs.
>
> [1] https://lore.kernel.org/linux-arm-kernel/87wnhxjxlq.fsf@BL-laptop/
>
> Changes since v1:
> - dropped armada-385 patch, which was already applied
> - added commit messages
Thanks for updating the commit message.
I don't see any Fixes: tags here. So from that, can i assume that
there are no known broken devices? We don't need to involve stable.
Andrew
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:59 ` [PATCH v2 00/10] ARM: dts: mvebu: " Andrew Lunn
@ 2022-07-12 22:23 ` Marek Behún
0 siblings, 0 replies; 15+ messages in thread
From: Marek Behún @ 2022-07-12 22:23 UTC (permalink / raw)
To: Andrew Lunn
Cc: Gregory Clement, Sebastian Hesselbarth, Rob Herring,
Pali Rohár, linux-arm-kernel, devicetree, linux-kernel
On Tue, 12 Jul 2022 18:59:20 +0200
Andrew Lunn <andrew@lunn.ch> wrote:
> On Tue, Jul 12, 2022 at 06:40:58PM +0200, Marek Behún wrote:
> > As suggested by Gregory [1] (although he suggested it only for armada
> > 380), add definitions for PCIe legacy INTx interrupts into every DTS
> > file used by the pci-mvebu.c controller driver.
> >
> > It was tested on 88F6820 (A385) and 88F6281 (Kirkwood) SoCs.
> >
> > [1] https://lore.kernel.org/linux-arm-kernel/87wnhxjxlq.fsf@BL-laptop/
> >
> > Changes since v1:
> > - dropped armada-385 patch, which was already applied
> > - added commit messages
>
> Thanks for updating the commit message.
>
> I don't see any Fixes: tags here. So from that, can i assume that
> there are no known broken devices? We don't need to involve stable.
I don't think so. If it turns out we do, we can just send it to stable
afterwards.
Marek
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts
2022-07-12 16:40 [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts Marek Behún
` (10 preceding siblings ...)
2022-07-12 16:59 ` [PATCH v2 00/10] ARM: dts: mvebu: " Andrew Lunn
@ 2022-08-17 16:50 ` Pali Rohár
2022-09-02 14:51 ` Gregory CLEMENT
11 siblings, 1 reply; 15+ messages in thread
From: Pali Rohár @ 2022-08-17 16:50 UTC (permalink / raw)
To: Marek Behún
Cc: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Rob Herring,
linux-arm-kernel, devicetree, linux-kernel
Hello! What is state of these patches? I see no response for more than month.
On Tuesday 12 July 2022 18:40:58 Marek Behún wrote:
> As suggested by Gregory [1] (although he suggested it only for armada
> 380), add definitions for PCIe legacy INTx interrupts into every DTS
> file used by the pci-mvebu.c controller driver.
>
> It was tested on 88F6820 (A385) and 88F6281 (Kirkwood) SoCs.
>
> [1] https://lore.kernel.org/linux-arm-kernel/87wnhxjxlq.fsf@BL-laptop/
>
> Changes since v1:
> - dropped armada-385 patch, which was already applied
> - added commit messages
>
> Pali Rohár (10):
> ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts
> ARM: dts: dove: Add definitions for PCIe legacy INTx interrupts
> ARM: dts: armada-370.dtsi: Add definitions for PCIe legacy INTx
> interrupts
> ARM: dts: armada-xp-98dx3236.dtsi: Add definitions for PCIe legacy
> INTx interrupts
> ARM: dts: armada-xp-mv78230.dtsi: Add definitions for PCIe legacy INTx
> interrupts
> ARM: dts: armada-xp-mv78260.dtsi: Add definitions for PCIe legacy INTx
> interrupts
> ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx
> interrupts
> ARM: dts: armada-375.dtsi: Add definitions for PCIe legacy INTx
> interrupts
> ARM: dts: armada-380.dtsi: Add definitions for PCIe legacy INTx
> interrupts
> ARM: dts: armada-39x.dtsi: Add definitions for PCIe legacy INTx
> interrupts
>
> arch/arm/boot/dts/armada-370.dtsi | 28 ++++-
> arch/arm/boot/dts/armada-375.dtsi | 28 ++++-
> arch/arm/boot/dts/armada-380.dtsi | 42 ++++++-
> arch/arm/boot/dts/armada-39x.dtsi | 56 +++++++--
> arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 14 ++-
> arch/arm/boot/dts/armada-xp-mv78230.dtsi | 70 +++++++++--
> arch/arm/boot/dts/armada-xp-mv78260.dtsi | 126 ++++++++++++++++---
> arch/arm/boot/dts/armada-xp-mv78460.dtsi | 140 ++++++++++++++++++----
> arch/arm/boot/dts/dove.dtsi | 28 ++++-
> arch/arm/boot/dts/kirkwood-6192.dtsi | 14 ++-
> arch/arm/boot/dts/kirkwood-6281.dtsi | 14 ++-
> arch/arm/boot/dts/kirkwood-6282.dtsi | 28 ++++-
> arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 14 ++-
> 13 files changed, 516 insertions(+), 86 deletions(-)
>
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 00/10] ARM: dts: mvebu: Add definitions for PCIe legacy INTx interrupts
2022-08-17 16:50 ` Pali Rohár
@ 2022-09-02 14:51 ` Gregory CLEMENT
0 siblings, 0 replies; 15+ messages in thread
From: Gregory CLEMENT @ 2022-09-02 14:51 UTC (permalink / raw)
To: Pali Rohár, Marek Behún
Cc: Andrew Lunn, Sebastian Hesselbarth, Rob Herring, linux-arm-kernel,
devicetree, linux-kernel
Hello,
> Hello! What is state of these patches? I see no response for more than
> month.
Actually I didn't received the second version of the series, but I
manged to find it in lore and so I applied it on mvebu/dt
Thanks,
Gregory
>
> On Tuesday 12 July 2022 18:40:58 Marek Behún wrote:
>> As suggested by Gregory [1] (although he suggested it only for armada
>> 380), add definitions for PCIe legacy INTx interrupts into every DTS
>> file used by the pci-mvebu.c controller driver.
>>
>> It was tested on 88F6820 (A385) and 88F6281 (Kirkwood) SoCs.
>>
>> [1] https://lore.kernel.org/linux-arm-kernel/87wnhxjxlq.fsf@BL-laptop/
>>
>> Changes since v1:
>> - dropped armada-385 patch, which was already applied
>> - added commit messages
>>
>> Pali Rohár (10):
>> ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts
>> ARM: dts: dove: Add definitions for PCIe legacy INTx interrupts
>> ARM: dts: armada-370.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>> ARM: dts: armada-xp-98dx3236.dtsi: Add definitions for PCIe legacy
>> INTx interrupts
>> ARM: dts: armada-xp-mv78230.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>> ARM: dts: armada-xp-mv78260.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>> ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>> ARM: dts: armada-375.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>> ARM: dts: armada-380.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>> ARM: dts: armada-39x.dtsi: Add definitions for PCIe legacy INTx
>> interrupts
>>
>> arch/arm/boot/dts/armada-370.dtsi | 28 ++++-
>> arch/arm/boot/dts/armada-375.dtsi | 28 ++++-
>> arch/arm/boot/dts/armada-380.dtsi | 42 ++++++-
>> arch/arm/boot/dts/armada-39x.dtsi | 56 +++++++--
>> arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 14 ++-
>> arch/arm/boot/dts/armada-xp-mv78230.dtsi | 70 +++++++++--
>> arch/arm/boot/dts/armada-xp-mv78260.dtsi | 126 ++++++++++++++++---
>> arch/arm/boot/dts/armada-xp-mv78460.dtsi | 140 ++++++++++++++++++----
>> arch/arm/boot/dts/dove.dtsi | 28 ++++-
>> arch/arm/boot/dts/kirkwood-6192.dtsi | 14 ++-
>> arch/arm/boot/dts/kirkwood-6281.dtsi | 14 ++-
>> arch/arm/boot/dts/kirkwood-6282.dtsi | 28 ++++-
>> arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 14 ++-
>> 13 files changed, 516 insertions(+), 86 deletions(-)
>>
>> --
>> 2.35.1
>>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
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