From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 0/5] Add IRQC support to Renesas RZ/G2L and RZ/V2L SoC
Date: Mon, 18 Jul 2022 20:56:46 +0100 [thread overview]
Message-ID: <20220718195651.7711-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
Hi All,
This patch series adds IRQC support to handle GPIO and external interrupts
support to RZ/G2L and RZ/V2L SoC's. Alongside enables PHY interrupt
support to ETH0/1 on SMARC EVK.
Note: The driver patches are in -next and the DT binding patch for RZ/V2L
is posted [0].
[0] https://patchwork.kernel.org/project/linux-renesas-soc/patch/
20220718193745.7472-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
Lad Prabhakar (5):
arm64: dts: renesas: r9a07g044: Add IRQC node to SoC DTSI
arm64: dts: renesas: r9a07g044: Update pinctrl node to handle GPIO
interrupts
arm64: dts: renesas: r9a07g054: Add IRQC node to SoC DTSI
arm64: dts: renesas: r9a07g054: Update pinctrl node to handle GPIO
interrupts
arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for
ETH{0/1}
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 59 +++++++++++++++++++
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 59 +++++++++++++++++++
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 10 +++-
3 files changed, 126 insertions(+), 2 deletions(-)
--
2.25.1
next reply other threads:[~2022-07-18 19:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-18 19:56 Lad Prabhakar [this message]
2022-07-18 19:56 ` [PATCH 1/5] arm64: dts: renesas: r9a07g044: Add IRQC node to SoC DTSI Lad Prabhakar
2022-07-21 10:38 ` Geert Uytterhoeven
2022-07-18 19:56 ` [PATCH 2/5] arm64: dts: renesas: r9a07g044: Update pinctrl node to handle GPIO interrupts Lad Prabhakar
2022-07-21 10:41 ` Geert Uytterhoeven
2022-07-18 19:56 ` [PATCH 3/5] arm64: dts: renesas: r9a07g054: Add IRQC node to SoC DTSI Lad Prabhakar
2022-07-21 10:39 ` Geert Uytterhoeven
2022-07-18 19:56 ` [PATCH 4/5] arm64: dts: renesas: r9a07g054: Update pinctrl node to handle GPIO interrupts Lad Prabhakar
2022-07-21 10:41 ` Geert Uytterhoeven
2022-07-18 19:56 ` [PATCH 5/5] arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for ETH{0/1} Lad Prabhakar
2022-07-21 10:46 ` Geert Uytterhoeven
2022-07-21 11:06 ` Lad, Prabhakar
2022-07-21 11:43 ` Geert Uytterhoeven
2022-07-21 11:54 ` Lad, Prabhakar
2022-07-21 11:59 ` Geert Uytterhoeven
2022-07-21 12:06 ` Lad, Prabhakar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220718195651.7711-1-prabhakar.mahadev-lad.rj@bp.renesas.com \
--to=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=biju.das.jz@bp.renesas.com \
--cc=devicetree@vger.kernel.org \
--cc=geert+renesas@glider.be \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=magnus.damm@gmail.com \
--cc=prabhakar.csengg@gmail.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).