From: Nishanth Menon <nm@ti.com>
To: Rob Herring <robh@kernel.org>
Cc: Aradhya Bhatia <a-bhatia1@ti.com>,
Tomi Valkeinen <tomba@kernel.org>, Jyri Sarha <jyri.sarha@iki.fi>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Darren Etheridge <detheridge@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Rahul T R <r-ravikumar@ti.com>, Krunal Bhargav <k-bhargav@ti.com>,
Devarsh Thakkar <devarsht@ti.com>,
DRI Development List <dri-devel@lists.freedesktop.org>,
Devicetree List <devicetree@vger.kernel.org>,
Linux Kernel List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/8] dt-bindings: display: ti,am65x-dss: Add port properties for DSS
Date: Fri, 22 Jul 2022 11:16:21 -0500 [thread overview]
Message-ID: <20220722161621.p35apy5mstpgqhef@reverence> (raw)
In-Reply-To: <20220720232845.GA4164694-robh@kernel.org>
On 17:28-20220720, Rob Herring wrote:
> > On the bridge side R0->R2, G0->G1, B0->B2 would be tied to ground.
> > The bridge sees 24bits of data, but the lsb's are always zero.
>
> Unless the bridge ignores the LSBs, that's not the right way to do 16 to
> 24 bit. The LSBs should be connected to the MSB of the color component
> to get full color range.
I unfortunately cannot point specifics without violating NDAs, so
will just give a broad perspective.
Correct, this is not ideal, but in certain scenarios with limited
pins (due to iovoltage groups), we are indeed starting to see this
kind of usage model starting to pop up. Tradeoff is in a limit on
image quality, but that tends to be acceptable in certain lower cost
solutions.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
next prev parent reply other threads:[~2022-07-22 16:16 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-19 8:08 sFrom b69208b75f7ae8e223c81783afb04fecd2f5faf8 Mon Sep 17 00:00:00 2001 Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 1/8] dt-bindings: display: ti,am65x-dss: Add port properties for DSS Aradhya Bhatia
2022-07-20 23:28 ` Rob Herring
2022-07-22 16:16 ` Nishanth Menon [this message]
2022-07-28 6:28 ` Tomi Valkeinen
2022-07-25 11:26 ` Aradhya Bhatia
2022-07-25 22:14 ` Francesco Dolcini
2022-08-10 17:48 ` Rob Herring
2022-07-28 11:16 ` Tomi Valkeinen
2022-07-19 8:08 ` [PATCH 2/8] dt-bindings: display: ti,am65x-dss: Add IO CTRL property for AM625 OLDI Aradhya Bhatia
2022-07-20 23:32 ` Rob Herring
2022-07-25 11:34 ` Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 3/8] drm/tidss: Add support for DSS port properties Aradhya Bhatia
2022-07-28 12:07 ` Tomi Valkeinen
2022-07-19 8:08 ` [PATCH 4/8] drm/tidss: Add support for Dual Link LVDS Bus Format Aradhya Bhatia
2022-07-28 11:03 ` Tomi Valkeinen
2022-07-28 11:45 ` Tomi Valkeinen
2022-08-09 5:58 ` Aradhya Bhatia
2022-08-09 6:28 ` Tomi Valkeinen
2022-08-09 9:06 ` Aradhya Bhatia
2022-08-09 9:51 ` Tomi Valkeinen
2022-08-09 13:34 ` Aradhya Bhatia
2022-08-01 3:32 ` Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 5/8] drm/tidss: dt property to force 16bit VP output to a 24bit bridge Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 6/8] drm/tidss: Add IO CTRL and Power support for OLDI TX in AM625 Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 7/8] drm/tidss: Fix clock request value for OLDI videoports Aradhya Bhatia
2022-07-28 10:05 ` Tomi Valkeinen
2022-07-29 3:56 ` Aradhya Bhatia
2022-07-29 8:13 ` Tomi Valkeinen
2022-07-19 8:08 ` [PATCH 8/8] drm/tidss: Enable Dual and Duplicate Modes for OLDI Aradhya Bhatia
2022-07-27 13:22 ` Tomi Valkeinen
2022-07-28 6:46 ` Tomi Valkeinen
2022-07-28 8:49 ` Aradhya Bhatia
2022-07-28 11:29 ` Tomi Valkeinen
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